Patent DE296994C successfully refreshed from Google Patents.
Patent US5459423A successfully refreshed from Google Patents.
US5459423A
Expired / Lapsed
US
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Semiconductor integrated circuit for a stable constant delay time
Assignee: Toshiba Corp
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Filing: 1993-06-18
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Granted: 1995-10-17
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Expires: 2013-06-18
Abstract
Abstract A delay circuit is interposed between first and second circuit systems both driven by a first supply voltage. The delay circuit delays a signal applied by the first circuit system, and then transmits the delayed signal to the second circuit system. In particular, a constant voltage supply circuit generates a second supply voltage (constant voltage) on the basis of the first supply voltage, and supplies the constant voltage to this delay circuit, so that a stable constant delay time can be obtained by the delay circuit without being subjected to the influence of fluctuations of the first supply voltage. All the circuit elements are formed on the same semiconductor substrate. Further, it is preferable to construct the constant voltage supply circuit in such a way that the output voltage thereof is programmable.
Inventors
- 👤 Yasumitsu Nozawa
- 👤 Shigeto Mizukami
- 👤 Makoto Segawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:13
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/28; G; G11; G11C; G11C7/00; G11C7/22; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F1/466; H03K5/00; H03K5/13; H03K5/133
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
129 words
A semiconductor integrated circuit, comprising: a first circuit system supplied with a first supply voltage, for receiving an input signal; a delay circuit for delaying an output of said first circuit system; a second circuit system supplied with the first supply voltage, for generating an output in response to the output of said delay circuit; and a constant voltage supply circuit, supplied with the first supply voltage, for supplying a constant voltage to said delay circuit, said delay circuit being supplied with only said constant voltage, said constant voltage supply circuit further including programmable means for determining a voltage value of said constant voltage, said constant voltage supply circuit being formed on a semiconductor substrate together with said first circuit system, said delay circuit and said second circuit system.
Claim 2
Dependent Claim
129 words
A semiconductor integrated circuit, comprising: a first circuit system supplied with a first supply voltage, for receiving an input signal; a delay circuit for delaying an output of said first circuit system; a second circuit system supplied with the first supply voltage, for generating an output in response to the output of said delay circuit; and a constant voltage supply circuit, supplied with the first supply voltage, for supplying a constant voltage to said delay circuit, said delay circuit being supplied with only said constant voltage, said constant voltage supply circuit further including programmable means for determining a voltage value of said constant voltage, said constant voltage supply circuit being formed on a semiconductor substrate together with said first circuit system, said delay circuit and said second circuit system.
Claim 3
Dependent Claim
25 words
The semiconductor integrated circuit as claimed in claim 1, wherein said programmable means comprises a voltage dividing circuit for selectively dividing said first supply voltage.
Claim 4
Dependent Claim
190 words
The semiconductor integrated circuit as claimed in claim 2, wherein said voltage dividing circuit comprises: a group of high potential side MOS transistors each having a source and a drain connected between a supply point of the first supply voltage and a voltage dividing point, respectively, so as to function as high potential side active resistance elements; a group of low potential side MOS transistors each having a source and a drain connected between the voltage dividing point and a ground, respectively so as to function as low potential side active resistance elements; a group of high potential side fuses each providing a connection between the voltage dividing point and a transistor of said high potential side MOS transistor group, said fuses selectively cutting off connections between the voltage dividing point and transistors of said high potential side MOS transistor group; and a group of low potential side fuses each providing a connection between the voltage dividing point and a transistor of said low potential side MOS transistor group, said fuses selectively cutting off connections between the voltage dividing point and transistors of said low potential side MOS transistor group.
Claim 5
Dependent Claim
32 words
The semiconductor integrated circuit as claimed in 2, which further comprises a differential amplifier for outputting an amplified output on the basis of a reference voltage outputted by said voltage dividing circuit.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-10-16 | 1999-04-17 | 1999-10-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-10-16 | 2003-04-17 | 2003-10-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-10-16 | 2007-04-17 | 2007-10-17 | $7700.00 | Window Closed / Lapsed |