US5449635A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating a semiconductor memory
Assignee: SK Hynix Inc
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Filing: 1993-12-28
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Granted: 1995-09-12
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Expires: 2013-12-28
Abstract
Abstract A method for fabricating a semiconductor memory, including the steps of: forming transistors on a semiconductor substrate (100); forming a first insulation film (23, 24, 25) on the semiconductor substrate; forming contact holes by selectively etching the first insulation film; forming successively a first conductive layer (26), an etch preventing film (27), and a first temporary film (28) on the substrate and the contact holes; etching the first temporary film and the etch preventing film to selectively expose the first conduction layer; forming a second temporary film (30) on the first temporary film and the first conductive layer; etching the second temporary film to form sidewall spacers of the second temporary film at sidewalls of the first temporary film; patterning the first conduction film using the first temporary film and the sidewall spacers as masks; forming a second insulation film (31) on the first conductive layer, the sidewall spacers and the first temporary film; etching the second insulation film selectively removing the temporary film and the sidewall spacers; forming a second conductive film (34) on the second insulation film, the first conductive layer and the etch preventing film; etching the second conductive layer to form a capacitor storage node (35) composed of the first conduction layer and the second conduction layer by removing the second insulation film.
Inventors
- 👤 Young K. Jun
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 05:20
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10B12/318; H10B12/01; H10B12/02; H10B12/03; H10B12/033
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
217 words
A method for fabricating a semiconductor memory, comprising steps for: forming transistors on a semiconductor substrate; forming a first insulation film on the semiconductor substrate on which the transistors have been formed; forming contact holes having round upper part by etching the first insulation film selectively; forming successively a first conductive layer, an etch preventing film and a first temporary film on the substrate and the contact holes; etching the first temporary film and the etch preventing film to selectively expose the first conductive layer; forming a second temporary film on the first temporary film and the first conductive layer; etching the second temporary film to form sidewall spacers of the second temporary film at sidewalls of the first temporary film; patterning the first conductive film using the first temporary film and the sidewall spacers as masks; forming a second insulation film on the first conductive layer, the sidewall spacers and the first temporary film; etching the second insulation film selectively removing the temporary film and the sidewall spacers; forming a second conductive film on the second insulation film, the first conductive layer and the etch preventing film; and etching the second conductive layer to form a capacitor storage node composed of the first conductive layer and the second conductive layer by removing the second insulation film.
Claim 2
Independent Claim
217 words
A method for fabricating a semiconductor memory, comprising steps for: forming transistors on a semiconductor substrate; forming a first insulation film on the semiconductor substrate on which the transistors have been formed; forming contact holes having round upper part by etching the first insulation film selectively; forming successively a first conductive layer, an etch preventing film and a first temporary film on the substrate and the contact holes; etching the first temporary film and the etch preventing film to selectively expose the first conductive layer; forming a second temporary film on the first temporary film and the first conductive layer; etching the second temporary film to form sidewall spacers of the second temporary film at sidewalls of the first temporary film; patterning the first conductive film using the first temporary film and the sidewall spacers as masks; forming a second insulation film on the first conductive layer, the sidewall spacers and the first temporary film; etching the second insulation film selectively removing the temporary film and the sidewall spacers; forming a second conductive film on the second insulation film, the first conductive layer and the etch preventing film; and etching the second conductive layer to form a capacitor storage node composed of the first conductive layer and the second conductive layer by removing the second insulation film.
Claim 3
Dependent Claim
111 words
A method according to claim 1, wherein the step of forming contact holes includes the steps of: forming a first insulation film on the semiconductor substrate; forming a second insulation film on the first insulation film; forming a second insulation pattern by selective etching the second insulation film; forming a third insulation film on the first insulation film and the second insulation film pattern; etching the third insulation film to form sidewall spacers of the third insulation film at sidewalls of the second insulation film pattern; and etching the first insulation film selectively using the second insulation film pattern and the sidewall spacers of the third insulation film as a mask.
Claim 4
Dependent Claim
26 words
A method according to claim 2, wherein the second insulation film is formed of material having a greater selective etching ratio against the first insulation film.
Claim 5
Dependent Claim
26 words
A method according to claim 1, wherein the etch preventing film is formed of material having etching selectivity in dry etching against the first conduction layer.
Claim 6
Dependent Claim
27 words
A method according to claim 4, wherein the etch preventing film is formed of an organic insulation film of poly amide or PIQ, or a nitride film.
Claim 7
Dependent Claim
26 words
A method according to claim 1, wherein the first temporary film is formed of material having etching selectivity in wet etching against the etch preventing film.
Claim 8
Dependent Claim
26 words
A method according to claim 1, wherein the sidewall spacers of the second temporary film are formed of the same material as the first temporary film.
Claim 9
Dependent Claim
49 words
A method according to claim 1, wherein the second insulation film is formed of a material having an etching selectively over the temporary film and the sidewall spacers of the second temporary film in wet etching, while having an etching selectively over the first conductive layer in dry etching.
Claim 10
Dependent Claim
24 words
A method according to claim 8, wherein the second insulation film is formed of an organic insulation film of polyamide or a nitride film.
Claim 11
Dependent Claim
61 words
A method according to claim 8, wherein the step of forming contact holes includes the steps of: forming an insulation film on the semiconductor substrate; forming contact holes on predetermined parts by a selective etching of the first insulation film; and etching the corner of the upper part of the contact hole by carrying out a sputter etching using inert ions.
Claim 12
Dependent Claim
43 words
A method according to claim 1, wherein the step of forming contact holes includes the steps of: forming a first insulation film on the semiconductor substrate; forming contact holes on parts of the first insulation film; and wet etching the first insulation film.
Claim 13
Dependent Claim
58 words
A method according to claim 1, wherein the step of forming contact holes includes the steps of: forming a first insulation film on the semiconductor substrate on which transistors have been formed; forming contact holes on parts by a selective etching of the first insulation film; and carrying out an isotropic dry etching of the first insulation film.
Claim 14
Dependent Claim
27 words
A method according to claim 1, wherein the first conductive layer is protected by the etch preventing film in said step of etching the second conductive layer.
Claim 15
Dependent Claim
33 words
A method according to claim 1, further comprising the step of etching the etch preventing film using the second conductive layer as a mask after said step of etching the second conductive layer.
Claim 16
Dependent Claim
26 words
A method according to claim 14, wherein said step of etching the etch preventing film is carried out using a dry etching or a well etching.
Claim 17
Dependent Claim
49 words
A method according to claim 1, further comprising the steps of: forming capacitor dielectric film on the surface of the capacitor storage node, after said step of etching the second conductive layer, to form the capacitor storage node; and forming a capacitor plate pole on the capacitor dielectric film.
Claim 18
Dependent Claim
19 words
A method according to claim 1, wherein the first and second temporary films are formed of an insulation film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-09-11 | 1999-03-13 | 1999-09-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-09-11 | 2003-03-13 | 2003-09-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-09-11 | 2007-03-13 | 2007-09-12 | $7700.00 | Window Closed / Lapsed |