Method of fabricating a semiconductor device having a capacitor in a stacked memory cell

Claim 1

A method of fabricating a semiconductor device, comprising the steps of: forming a multi-layer film comprising a first kind of layer and a second kind of layer; performing first etching for patterning said multi-layer film under a first etching condition; performing second etching for forming preferentially etched surface areas in the sides of a multi-layer film under a second etching condition wherein said first kind of layer and said second kind of layer have respectively different etching rates under said second etching condition; forming a conductive film in such a manner as to cover said multi-layer film, said conductive film having an etching rate smaller than that of any of layers constituting said multi-layer film under a third etching condition; forming openings in said conductive film at prescribed positions to expose said multilayer film through said opening; and performing third etching under said third etching condition to remove said multi-layer film, while leaving said conductive film; wherein the etching rate difference between any layer of said multi-layer film and the neighboring layers under said second etching condition is greater than the etching rate difference between said layer and said neighboring layers under said first etching condition.

Claim 2

A method of fabricating a semiconductor device, comprising the steps of: forming a multi-layer film comprising a first kind of layer and a second kind of layer; performing first etching for patterning said multi-layer film under a first etching condition; performing second etching for forming preferentially etched surface areas in the sides of a multi-layer film under a second etching condition wherein said first kind of layer and said second kind of layer have respectively different etching rates under said second etching condition; forming a conductive film in such a manner as to cover said multi-layer film, said conductive film having an etching rate smaller than that of any of layers constituting said multi-layer film under a third etching condition; forming openings in said conductive film at prescribed positions to expose said multilayer film through said opening; and performing third etching under said third etching condition to remove said multi-layer film, while leaving said conductive film; wherein the etching rate difference between any layer of said multi-layer film and the neighboring layers under said second etching condition is greater than the etching rate difference between said layer and said neighboring layers under said first etching condition.

Claim 4

A method of fabricating a semiconductor device, comprising the steps of: forming switching transistors on a semiconductor substrate; forming on said semiconductor substrate an insulating film to cover said switching transistors; forming contact holes in said insulating film, said contact holes reaching active regions of said switching transistors; forming on said insulating film a first conductive film which contacts said active regions of said switching transistors through said contact holes; forming on said first conductive film a multi-layer film comprising a first kind of layer and a second kind of layer; performing first etching on prescribed portions of said multi-layer until the surface of said first conductive film is exposed; performing second etching on the sides of said multilayer film to form preferentially etched surface areas thereon wherein said first kind of layer and said second kind of layer have respectively different etching rates under said second etching condition; forming a second conductive film covering the sides of said multi-layer film; and performing third etching to remove said multi-layer film; wherein the etching rate difference between any layer of said multi-layer film and the neighboring layers under said second etching condition is greater than the etching rate difference between said layer and said neighboring layers under said first etching condition.

Claim 5

A method of fabricating a semiconductor device, comprising the steps of: forming switching transistors on a semiconductor substrate; forming on said semiconductor substrate an insulating film to cover said switching transistors; forming contact holes in said insulating film, said contact holes reaching active regions of said switching transistors; forming on said insulating film a first conductive film which contacts said active regions of said switching transistors through said contact holes; forming on said first conductive film a multi-layer film comprising a first kind of layer and a second kind of layer; performing first etching on prescribed portions of said multi-layer until the surface of said first conductive film is exposed; performing second etching on the sides of said multilayer film to form preferentially etched surface areas thereon wherein said first kind of layer and said second kind of layer have respectively different etching rates under said second etching condition; forming a second conductive film covering the sides of said multi-layer film; and performing third etching to remove said multi-layer film; wherein the etching rate difference between any layer of said multi-layer film and the neighboring layers under said second etching condition is greater than the etching rate difference between said layer and said neighboring layers under said first etching condition.