Differential comparator with differential threshold for local area networks or the like

Claim 2

A comparator having two inputs and a differential threshold value, disposed in an integrated circuit, having a first (slave) section, the first section being CHARACTERIZED BY: a first differential pair of transistors (31) having a common output, two inputs, and two outputs, the inputs coupling to the inputs of the comparator; a first variable current source (34) coupling to the common output of the first differential pair; a first bilateral current mirror (32) coupling to the outputs of the first differential pair; a first amplifier stage having an output and coupling to one output of the first differential pair, the output being an output of the comparator; wherein the differential threshold value of the comparator is substantially determined by the current passed by the current source.

Claim 3

The comparator as recited in claim 1, having a second (master) section, the second section being characterized by: a second differential pair of transistors (41) having a common output, two inputs, and two outputs, the inputs coupling to corresponding fixed biases, the difference in the biases being substantially equal to the threshold value of the comparator; a second variable current source (44) coupling to the common output of the second differential pair; a second bilateral current mirror (42) coupling to the outputs of the second differential pair; a second amplifier stage (43) having an output and art input coupling to one output of the differential pair. wherein the first and Second variable current sources are responsive to the output of the second amplifier stage to control the current passed by the sources.

Claim 4

The comparator as recited in claim 2, wherein the first and second differential pairs of transistors are substantially the same and the current carried by the first and second variable current sources are substantially the same.

Claim 5

A comparator having two inputs, an output, and a differential threshold value, the comparator having an first (slave) section, the first section being CHARACTERIZED BY: a first differential pair of transistors (13), having two inputs and two outputs, the inputs coupling to the corresponding inputs of the comparator; a first amplifier stage (11 L ), having a variable bias (17 L ), an input coupling to an output of the first differential pair, and an Output coupling to the output of the comparator; wherein the differential threshold value of the comparator is substantially determined by the amount of bias in the amplifier stage.

Claim 6

A comparator having two inputs, an output, and a differential threshold value, the comparator having an first (slave) section, the first section being CHARACTERIZED BY: a first differential pair of transistors (13), having two inputs and two outputs, the inputs coupling to the corresponding inputs of the comparator; a first amplifier stage (11 L ), having a variable bias (17 L ), an input coupling to an output of the first differential pair, and an Output coupling to the output of the comparator; wherein the differential threshold value of the comparator is substantially determined by the amount of bias in the amplifier stage.

Claim 7

The comparator as recited in claim 4, wherein the comparator has an second (master) section, the second section being characterized by: a second differential pair of transistors (23), having two inputs and two outputs, the inputs coupling to fixed biases; a second amplifier stage (21), having a variable bias (27), an input coupling to an output of the second differential pair, and an output; feedback means (28), coupling to the output of the second amplifier stage, for maintaining the output of the second amplifier stage substantially equal to a reference voltage by varying the bias in the second amplifier stage; wherein the feedback means additionally varies the bias in the first amplifier stage.

Claim 8

The comparator as recited in claim 5, wherein the first section is further characterized by an gain stage (12) having an output, a threshold value substantially equal to the reference voltage, and an input coupled to the output of the first amplifier stage, the output of the gain stage being the output of the comparator.

Claim 9

The differential comparator as recited in claim 6, wherein the feedback means is an operational amplifier.

Claim 10

The differential comparator as recited in claim 7, wherein the reference voltage is supplied by an additional gain stage (22), substantially similar to the gain stage in the first section, having an input and an output connected together to provide at the output thereof the reference voltage.

Claim 11

In an integrated circuit, a comparator having two inputs for comparing a signal on the inputs to a differential threshold value, and an output, CHARACTERIZED BY: a master section (3) having: a first differential pair of transistors (23) with two inputs, two outputs, and a common output, the inputs connected to fixed biases having voltages differing by a predetermined voltage corresponding to the differential threshold voltage; and means (21,28) coupled to the two outputs of the first pair of transistors, for producing a control signal (TSET) proportional to the predetermined voltage; and a slave section (2) having: a second differential pair of transistors (13) with two inputs, two outputs, and a common output, the inputs coupling to the inputs of the comparator; and amplifying means (11 L , 12 L ) including a variable current source (17 L ) for providing bias currents in the amplifier means in response to the control signal, coupling to at least one of the outputs of the second pair of transistors and having an output coupling to the output of the comparator, for setting the differential threshold value of the comparator in response to the control signal.

Claim 12

In an integrated circuit, a comparator having two inputs for comparing a signal on the inputs to a differential threshold value, and an output, CHARACTERIZED BY: a master section (3) having: a first differential pair of transistors (23) with two inputs, two outputs, and a common output, the inputs connected to fixed biases having voltages differing by a predetermined voltage corresponding to the differential threshold voltage; and means (21,28) coupled to the two outputs of the first pair of transistors, for producing a control signal (TSET) proportional to the predetermined voltage; and a slave section (2) having: a second differential pair of transistors (13) with two inputs, two outputs, and a common output, the inputs coupling to the inputs of the comparator; and amplifying means (11 L , 12 L ) including a variable current source (17 L ) for providing bias currents in the amplifier means in response to the control signal, coupling to at least one of the outputs of the second pair of transistors and having an output coupling to the output of the comparator, for setting the differential threshold value of the comparator in response to the control signal.

Claim 13

The differential comparator as recited in claim 9, wherein the first and second pairs of differential transistors are substantially identical and the differential threshold value of the comparator is substantially equal to the predetermined voltage.

Claim 14

The differential comparator as recited in claim 9, wherein the means in the master section is further characterized by: a reference stage (22) having an output; an amplifier stage (21) having a bias varying in response to the control signal, an output, and an input coupled to at least one of the outputs of the first differential pair of transistors: feedback means (28), responsive to the output of the reference stage and the amplifier stage, for generating the control signal such that the output of the amplifier stage is kept substantially equal to the output of the reference stage; and wherein the amplifier means in the slave section is further characterized by: at least one amplifier stage (11 L ) with a bias varying in response to the control signal and an input coupled to the corresponding output of the second differential pair of transistors; at least one gain stage, responsive to the corresponding amplifier stage (12 L ), having an output coupling to the output of the comparator.

Claim 15

The differential comparator as recited in claim 11, wherein the reference stage provides a reference voltage and each gain stage has a predetermined threshold voltage, the threshold voltage of the gain stage being substantially equal to the reference voltage.