US5444013A
Expired / Lapsed
US
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Method of forming a capacitor
Assignee: Micron Technology Inc
•
Filing: 1994-11-02
•
Granted: 1995-08-22
•
Expires: 2014-11-02
Abstract
Abstract A method of forming a capacitor includes, a) providing a substrate; b) etching into the substrate to provide a depression in the substrate, the depression having a sidewall which is angled from vertical; c) providing a conformal layer of hemispherical grain polysilicon within the depression and over the angled sidewall, the layer of hemispherical grain polysilicon less than completely filling the depression; and d) ion implanting the hemispherical grain polysilicon layer with a conductivity enhancing impurity. Preferred methods of providing the depression where the substrate comprises SiO 2 include a dry, plasma enhanced, anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1, and facet sputter etching.
Inventors
- 👤 Salman Akram
- 👤 Charles Turner
- 👤 Alan Laulusa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 16:21
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10D1/716; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082; Y; Y10; Y10S; Y10S148/00; Y10S148/014; Y10S148/161; Y10S148/168; Y10S438/00; Y10S438/978
Claims Analysis
Total Claims: 30
Claim 1
Independent Claim
75 words
A method of forming a capacitor comprising the following steps: providing a substrate; etching into the substrate to provide a depression in the substrate, the depression having a sidewall which is angled from vertical; providing a conformal layer of hemispherical grain polysilicon within the depression and over the angled sidewall, the layer of hemispherical grain polysilicon less than completely filling the depression; and ion implanting the hemispherical grain polysilicon layer with a conductivity enhancing impurity.
Claim 2
Independent Claim
75 words
A method of forming a capacitor comprising the following steps: providing a substrate; etching into the substrate to provide a depression in the substrate, the depression having a sidewall which is angled from vertical; providing a conformal layer of hemispherical grain polysilicon within the depression and over the angled sidewall, the layer of hemispherical grain polysilicon less than completely filling the depression; and ion implanting the hemispherical grain polysilicon layer with a conductivity enhancing impurity.
Claim 3
Dependent Claim
27 words
The capacitor forming method of claim 1 wherein the step of etching is conducted to produce a depression sidewall angle from vertical of from 10° to 40°.
Claim 4
Dependent Claim
30 words
The capacitor forming method of claim 1 wherein the substrate comprises an outer insulating layer selected from the group consisting of SiO 2 , Si 3 N 4 and BPSG.
Claim 5
Dependent Claim
24 words
The capacitor forming method of claim 1 wherein the substrate comprises an outer insulating layer, and the step of etching comprises facet sputter etching.
Claim 6
Dependent Claim
27 words
The capacitor forming method of claim 1 wherein the substrate comprises an outer insulating layer, and the step of etching comprises a dry anisotropic spacer etch .
Claim 7
Dependent Claim
25 words
The capacitor forming method of claim 1 wherein the substrate comprises an outer layer of polysilicon, and the step of etching comprises facet sputter etching.
Claim 8
Dependent Claim
27 words
The capacitor forming method of claim 1 wherein the substrate comprises an outer layer of polysilicon, and the step of etching comprises a dry anisotropic spacer etch.
Claim 9
Dependent Claim
44 words
The capacitor forming method of claim 1 wherein the substrate comprises SiO 2 , and the step of etching comprises a dry anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1.
Claim 10
Dependent Claim
46 words
The capacitor forming method of claim 1 wherein the substrate comprises SiO 2 , and the step of etching comprises a dry, plasma enhanced, anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1.
Claim 11
Dependent Claim
16 words
The capacitor forming method of claim 1 wherein the step of etching comprises facet sputter etching.
Claim 12
Dependent Claim
25 words
The capacitor forming method of claim 1 wherein the hemispherical grain polysilicon is provided undoped prior to any ion implanting with a conductivity enhancing impurity.
Claim 13
Dependent Claim
23 words
The capacitor forming method of claim 1 wherein the ion implanting is conducted at a voltage ranging from 10 keV to 20 keV.
Claim 14
Dependent Claim
68 words
The capacitor forming method of claim 1 wherein the substrate comprises an outer insulating layer comprising SiO 2 , and the step of etching comprises a dry anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1, and the etching step is conducted to produce a depression sidewall angle from vertical of from 10° to 40°.
Claim 15
Dependent Claim
29 words
The capacitor forming method of claim 1 wherein the step of etching comprises facet sputter etching to produce a depression sidewall angle from vertical of from 20° to 40°.
Claim 16
Independent Claim
93 words
A method of forming a capacitor comprising the following steps: providing a substrate; etching into the substrate to provide a depression in the substrate, the depression having a sidewall which is angled from vertical; providing a conformal layer of hemispherical grain polysilicon within the depression and over the angled sidewall, the layer of hemispherical grain polysilicon less than completely filling the depression; and ion implanting the hemispherical grain polysilicon layer with a conductivity enhancing impurity, the ion implanting with the conductivity enhancing impurity being conducted only at a 0° angle relative to vertical.
Claim 17
Independent Claim
93 words
A method of forming a capacitor comprising the following steps: providing a substrate; etching into the substrate to provide a depression in the substrate, the depression having a sidewall which is angled from vertical; providing a conformal layer of hemispherical grain polysilicon within the depression and over the angled sidewall, the layer of hemispherical grain polysilicon less than completely filling the depression; and ion implanting the hemispherical grain polysilicon layer with a conductivity enhancing impurity, the ion implanting with the conductivity enhancing impurity being conducted only at a 0° angle relative to vertical.
Claim 18
Dependent Claim
27 words
The capacitor forming method of claim 15 wherein the step of etching is conducted to produce a depression sidewall angle from vertical of from 10° to 40°.
Claim 19
Dependent Claim
24 words
The capacitor forming method of claim 15 wherein the substrate comprises an outer insulating layer, and the step of etching comprises facet sputter etching.
Claim 20
Dependent Claim
26 words
The capacitor forming method of claim 15 wherein the substrate comprises an outer insulating layer, and the step of etching comprises a dry anisotropic spacer etch.
Claim 21
Dependent Claim
25 words
The capacitor forming method of claim 15 wherein the substrate comprises an outer layer of polysilicon, and the step of etching comprises facet sputter etching.
Claim 22
Dependent Claim
27 words
The capacitor forming method of claim 15 wherein the substrate comprises an outer layer of polysilicon, and the step of etching comprises a dry anisotropic spacer etch.
Claim 23
Dependent Claim
44 words
The capacitor forming method of claim 15 wherein the substrate comprises SiO 2 , and the step of etching comprises a dry anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1.
Claim 24
Dependent Claim
46 words
The capacitor forming method of claim 15 wherein the substrate comprises SiO 2 , and the step of etching comprises a dry, plasma enhanced, anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1.
Claim 25
Dependent Claim
16 words
The capacitor forming method of claim 15 wherein the step of etching comprises facet sputter etching.
Claim 26
Dependent Claim
23 words
The capacitor forming method of claim 15 wherein the substrate comprises SiO 2 , and the step of etching comprises facet sputter etching.
Claim 27
Dependent Claim
25 words
The capacitor forming method of claim 15 wherein the hemispherical grain polysilicon is provided undoped prior to any ion implanting with a conductivity enhancing impurity.
Claim 28
Dependent Claim
24 words
The capacitor forming method of claim 15 wherein the ion implanting is conducted at a voltage ranging from 10 keV to 20 keV. lo
Claim 29
Dependent Claim
63 words
The capacitor forming method of claim 15 wherein the substrate comprises SiO 2 , and the step of etching comprises a dry anisotropic spacer etch utilizing reactant gases of CF 4 and CHF 3 provided to the substrate at a volumetric ratio of 1:1, and the etching step is conducted to produce a depression sidewall angle from vertical of from 10° to 40°.
Claim 30
Dependent Claim
29 words
The capacitor forming method of claim 15 wherein the step of etching comprises facet sputter etching to produce a depression sidewall angle from vertical of from 20° to 40°.
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| 3.5 Years (Year 4) | 1998-08-21 | 1999-02-20 | 1999-08-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-08-21 | 2003-02-20 | 2003-08-22 | $3760.00 | Window Closed / Lapsed |
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