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US5439845A
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US
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Process for fabricating layered superlattice materials and making electronic devices including same
Assignee: Olympus Corp
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Filing: 1994-12-05
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Granted: 1995-08-08
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Expires: 2014-12-05
Abstract
Abstract A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry and RTP temperature of 725 DEG C. is optimum. The film is formed in two layers, the first of which uses a stoichiometric precursor and the second of which uses an excess bismuth precursor. The electronic properties are so regularly dependent on process parameters and material composition, and such a wide variety of materials are possible, that electronic devices can be designed by selecting from a continuous record of the values of one or more electronic properties as a continuous function of the process parameters and material composition, and utilizing the selected process and material composition to make a device.
Inventors
- 👤 Hitoshi Watanabe
- 👤 Carlos A. Paz de Araujo
- 👤 Hiroyuki Yoshimori
- 👤 Michael C. Scott
- 👤 Takashi Mihara
- 👤 Joseph D. Cuchiaro
- 👤 Larry D. McMillan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 11:10
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/66; H10P14/662; B; B05; B05D; B05D1/00; B05D1/60; B05D3/00; B05D3/04; B05D3/0493; C; C23; C23C; C23C16/00; C23C16/44; C23C16/4412; C23C16/448; C23C16/4486; C23C16/455; C23C16/45561; C23C16/45563; C23C16/4558; C23C16/46; C23C16/48; C23C16/482; C23C16/52; C23C18/00; C23C18/02; C23C18/12; C23C18/1204; C23C18/1208; C23C18/1216; C23C18/1225; C23C18/125; C23C18/1279; C23C18/1283; C23C18/1295; C23C26/00; C23C26/02; C30; C30B; C30B29/00; C30B29/60; C30B29/68; C30B7/00; C30B7/005; H01; H01C; H01C7/00; H01C7/10; H01C7/1013; H10B; H10B12/00; H10B12/30; H10B53/00; H10B53/30; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10D1/684; H10D1/692; H10N; H10N30/00; H10N30/01; H10N30/07; H10N30/074; H10N30/077; H10P14/63; H10P14/6326; H10P14/6342; H10P14/65; H10P14/6516; H10P14/6529; H10P14/6536; H10P14/6538; H10P14/668; H05; H05K; H05K3/00; H05K3/10; H05K3/105; H10P14/69; H10P14/692; H10P14/6938; H10P14/69398
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
110 words
A method of fabricating a capacitor, said method comprising the steps of: providing a substrate having a first electrode, and a precursor containing a plurality of metals in effective amounts for forming a layered superlattice material upon thermal treatment of said precursor; applying said precursor to said substrate; rapid thermal processing said precursor on said substrate in an oxygen-containing environment to form a layered superlattice material containing said metals on said substrate; furnace annealing said substrate subsequent to said step of rapid processing; and forming a second electrode on said layered superlattice material after said step of furnace annealing to form a capacitor, and subsequently performing a second furnace anneal
Claim 2
Independent Claim
110 words
A method of fabricating a capacitor, said method comprising the steps of: providing a substrate having a first electrode, and a precursor containing a plurality of metals in effective amounts for forming a layered superlattice material upon thermal treatment of said precursor; applying said precursor to said substrate; rapid thermal processing said precursor on said substrate in an oxygen-containing environment to form a layered superlattice material containing said metals on said substrate; furnace annealing said substrate subsequent to said step of rapid processing; and forming a second electrode on said layered superlattice material after said step of furnace annealing to form a capacitor, and subsequently performing a second furnace anneal
Claim 3
Dependent Claim
22 words
A method as in claim 10 and further comprising the steps of patterning said capacitor and subsequently performing a third furnace anneal.
Claim 4
Independent Claim
78 words
A method of fabricating a capacitor comprising the steps of: providing a first electrode and a precursor containing a metal; applying said precursor to said first electrode; annealing said precursor in a first anneal process to form a layered superlattice material; forming a second electrode on said layered superlattice material to form a capacitor comprising said layered superlattice material between said first and second electrodes; and annealing said superlattice material and second electrode in a second anneal process.
Claim 5
Independent Claim
78 words
A method of fabricating a capacitor comprising the steps of: providing a first electrode and a precursor containing a metal; applying said precursor to said first electrode; annealing said precursor in a first anneal process to form a layered superlattice material; forming a second electrode on said layered superlattice material to form a capacitor comprising said layered superlattice material between said first and second electrodes; and annealing said superlattice material and second electrode in a second anneal process.
Claim 6
Dependent Claim
24 words
A method as in claim 3 and further comprising the steps of patterning said capacitor and annealing said capacitor in a third anneal process.
Claim 7
Dependent Claim
36 words
A method as in claim 4 wherein said first anneal process is performed at a first temperature, and each of said second and third anneal processes are performed at a temperature lower than said first temperature.
References Cited (Backward Citations)
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