Patent US5432675A successfully refreshed from Google Patents.
US5432675A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-chip module having thermal contacts
Assignee: Fujitsu Semiconductor Ltd
•
Filing: 1993-11-15
•
Granted: 1995-07-11
•
Expires: 2013-11-15
Abstract
Abstract A multi-chip module (MCM) having semiconductor chips on a top surface of multi-layered interconnection circuits formed on a planar surface of a substrate including: (a) multi-layered interconnection circuits comprising alternatively laminated interconnection layers with insulating layers, and thermal contacts, each of the thermal contacts comprising successively laminated interconnection layers on a bottom and on side-walls of a vertical hole penetrating a plurality of the insulating layers, and a thermal conductor filling the vertical hole on the successively laminated interconnection layers, and (b) a plurality of the semiconductor chips attached to the thermal conductor. In a preferred embodiment, a V-shaped vertical hole is formed in the insulating layers of polyimide for a thermal contact, copper films are successively laminated thereon, unpatterned copper and gold films are deposited thereon, and the entire surface of the metal film including the hole is coated by a silver-powder containing epoxy film, to which semiconductor chips are adhered.
Inventors
- 👤 Haruo Sorimachi
- 👤 Kiyotaka Seyama
- 👤 Makoto Sumiyoshi
- 👤 Kazuaki Satoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 05:31
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/69; H10W40/00; H10W40/20; H10W40/22; H10W40/226; H10W40/228; H10W70/611; H10W70/62; H10W70/66; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
178 words
A multi-chip module having semiconductor chips on a top surface of multi-layer interconnection circuits formed on a planar surface of a substrate comprising: (a) a plurality of the semiconductor chips attached to an uppermost interconnection layer having a thermal contact; (b) a set of interconnection layers laminated alternatively with insulating layers except for an area of the thermal contact; (c) a plurality of the insulating layers each having a vertical hole having a sidewall in the area of the thermal contact; (d) the interconnection layers laminated successively on a bottom and side walls of the vertical hole so that the depth of the interconnection layers is increased successively as each subsequent interconnection layer covers the preceding interconnection layers on the bottom and along the side walls of the vertical hole from an upper layer to a lower layer of the insulating layers; and (e) the thermal contact formed by the interconnection layers laminated successively on a bottom and on side walls of the vertical hole and by a thermal conductor filling a remaining volume of the vertical hole.
Claim 2
Dependent Claim
178 words
A multi-chip module having semiconductor chips on a top surface of multi-layer interconnection circuits formed on a planar surface of a substrate comprising: (a) a plurality of the semiconductor chips attached to an uppermost interconnection layer having a thermal contact; (b) a set of interconnection layers laminated alternatively with insulating layers except for an area of the thermal contact; (c) a plurality of the insulating layers each having a vertical hole having a sidewall in the area of the thermal contact; (d) the interconnection layers laminated successively on a bottom and side walls of the vertical hole so that the depth of the interconnection layers is increased successively as each subsequent interconnection layer covers the preceding interconnection layers on the bottom and along the side walls of the vertical hole from an upper layer to a lower layer of the insulating layers; and (e) the thermal contact formed by the interconnection layers laminated successively on a bottom and on side walls of the vertical hole and by a thermal conductor filling a remaining volume of the vertical hole.
Claim 3
Dependent Claim
24 words
The multi-chip module according to claim 1, wherein each of the interconnection layers extends over a planar upper surface of each insulating layer, respectively.
Claim 4
Dependent Claim
23 words
The multi-chip module according to claim 1, wherein all of the interconnection layers are successively laminated on the bottom of the vertical hole.
Claim 5
Dependent Claim
23 words
The multi-chip module according to claim 1, wherein each of the interconnection layers is selected from the group of sandwich-structured chromium-copper-chromium and aluminum.
Claim 6
Dependent Claim
35 words
The multi-chip module according to claim 1, wherein the semiconductor chips adhere to the uppermost interconnection layer by a thermal conductor selected from the group of organic plastics with silver powder, and of soldering materials.
Claim 7
Dependent Claim
25 words
The multi-chip module according to claim 1, wherein the insulating layers are made of a material selected from the group of polyimide, epoxy, and teflon.
Claim 8
Dependent Claim
16 words
The multi-chip module according to claim 1, wherein the insulating layers are made of photosensitive polyimide.
Claim 9
Dependent Claim
21 words
The multi-chip module according to claim 1, wherein the uppermost interconnection layers is thicker than any of the preceding interconnection layers.
Claim 10
Dependent Claim
26 words
The multi-chip module according to claim 1, wherein the semiconductor chip is attached to the uppermost interconnection layer by metal bumps formed on the thermal contact.
Claim 11
Dependent Claim
35 words
The multi-chip module according to claim 1, wherein a diameter of the vertical hole in an upper layer of the insulating layers is larger than a diameter of the vertical hole in a lower layer.
Claim 12
Dependent Claim
16 words
The multi-chip module according to claim 1, wherein the thermal conductor adheres to the semiconductor chips.
Claim 13
Dependent Claim
27 words
The multi-chip module according to claim 9, wherein the metal bumps formed on a main surface of the semiconductor chip are formed integrally with the semiconductor chip.
Claim 14
Dependent Claim
60 words
The multi-chip module according to claim 1, wherein: (a) a first thermal contact ends on a planar upper part of an underlayered interconnection layer; (b) the underlayered interconnection layer is connected to an upper interconnection layer of a second thermal contact; and (c) a center of the first thermal contact is different from a center of the second thermal contact.
References Cited (Backward Citations)
US4729061A
Cited
US4667401A
Cited
US4783695A
Cited
US4963697A
Cited
US5121299A
Cited
US5227812A
Cited
US5161093A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-07-10 | 1999-01-09 | 1999-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-07-10 | 2003-01-09 | 2003-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-07-10 | 2007-01-09 | 2007-07-11 | $7700.00 | Window Closed / Lapsed |