US5429981A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of making linear capacitors for high temperature applications
Assignee: Honeywell Inc
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Filing: 1994-06-30
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Granted: 1995-07-04
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Expires: 2014-06-30
Abstract
Abstract A method for making a voltage linear capacitor for use with a metal oxide semiconductor field transistor wherein a capacitor portion of an SOI substrate is heavily doped with phosphorus. The thin oxide layer used for the transistor gate oxide also serves as the capacitor dielectric and the thickness of the dielectric relative to the gate oxide is controlled.
Inventors
- 👤 Gary R. Gardner
- 👤 Michael S. Liu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 09:43
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D86/00; H10D86/01
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
161 words
A method for making a capacitor for use with a metal oxide semiconductor field effect transistor, comprising the steps of: providing a silicon on insulator substrate having a first region for use as a first plate of said capacitor and a second region for forming said transistor; isolating said first region; implanting phosphorus ions into said first region to provide a first concentration of said phosphorus ions within said first region; forming an oxide layer over said first and second regions with said oxide layer over said first region having a first thickness and said oxide layer over said second region having a second thickness, with said first thickness exceeding said second thickness by not more than 30 percent; depositing a polysilicon over said first and second regions layer; and removing a portion of said polysilicon layer and of said oxide layer to define a gate for said transistor and to define a dielectric and a second plate of said capacitor.
Claim 2
Independent Claim
161 words
A method for making a capacitor for use with a metal oxide semiconductor field effect transistor, comprising the steps of: providing a silicon on insulator substrate having a first region for use as a first plate of said capacitor and a second region for forming said transistor; isolating said first region; implanting phosphorus ions into said first region to provide a first concentration of said phosphorus ions within said first region; forming an oxide layer over said first and second regions with said oxide layer over said first region having a first thickness and said oxide layer over said second region having a second thickness, with said first thickness exceeding said second thickness by not more than 30 percent; depositing a polysilicon over said first and second regions layer; and removing a portion of said polysilicon layer and of said oxide layer to define a gate for said transistor and to define a dielectric and a second plate of said capacitor.
Claim 3
Dependent Claim
44 words
Method of claim 1 wherein said step of implanting phosphorus ions comprises the following steps: forming a barrier oxide on said substrate; masking said barrier oxide to allow implantation through said barrier oxide only in said isolated first region; and removing said barrier oxide.
Claim 4
Dependent Claim
38 words
Method of claim 2 wherein said barrier oxide has a thickness of about 2000 angstroms and said phosphorus ions are implanted at a dose of about 6E14 per cm 2 and an ion energy of about 190 KeV.
Claim 5
Dependent Claim
20 words
Method of claim 1 wherein said oxide layer over said second region has a thickness of 150 to 400 angstroms.
Claim 6
Dependent Claim
44 words
Method of claim 1 wherein said step of implanting phosphorus ions comprises the following steps: forming a pad oxide on said substrate: masking said pad oxide to allow implantation through said pad oxide only in said isolated first region; and removing said pad oxide.
Claim 7
Dependent Claim
35 words
Method of claim 5 wherein said pad oxide has a thickness of about 200 angstroms and said phosphorus ions are implanted at a dose of about 0.6E15 and an ion energy of about 30 Kev.
Claim 8
Independent Claim
165 words
A method for making a capacitor for use with a metal oxide semiconductor field effect transistor, comprising the steps of: providing a silicon on insulator substrate having a first region for use as a first plate of said capacitor and a second region for forming said transistor; isolating said first region; implanting impurity ions into said first region to provide a first concentration of said impurity ions within said first region; forming by growth an oxide layer over said first and second regions with said oxide layer over said first region having a first thickness and said oxide layer over said second region having a second thickness, with said first thickness exceeding said second thickness by less than 30 percent of said second thickness; depositing a polysilicon layer over said first and second regions; and removing portions of said polysilicon layer and of said oxide layer to define a gate for said transistor and to define a dielectric and a second plate of said capacitor.
Claim 9
Independent Claim
165 words
A method for making a capacitor for use with a metal oxide semiconductor field effect transistor, comprising the steps of: providing a silicon on insulator substrate having a first region for use as a first plate of said capacitor and a second region for forming said transistor; isolating said first region; implanting impurity ions into said first region to provide a first concentration of said impurity ions within said first region; forming by growth an oxide layer over said first and second regions with said oxide layer over said first region having a first thickness and said oxide layer over said second region having a second thickness, with said first thickness exceeding said second thickness by less than 30 percent of said second thickness; depositing a polysilicon layer over said first and second regions; and removing portions of said polysilicon layer and of said oxide layer to define a gate for said transistor and to define a dielectric and a second plate of said capacitor.
Claim 10
Dependent Claim
18 words
Method of claim 7 wherein said impurity ions are selected from the group consisting of phosphorus and arsenic.
Claim 11
Dependent Claim
40 words
Method of claim 8 wherein said step of implanting includes implanting phosphorus ions at a dose of about 6E14 per cm 2 and an energy of about 190 KeV through a barrier oxide having a thickness of about 2000 angstroms.
Claim 12
Dependent Claim
40 words
Method of claim 9 wherein said step of implanting includes implanting phosphorus ions at a dose of about 6E14 per cm 2 and an energy of about 60 KeV through a pad oxide having a thickness of about 200 angstroms.
Claim 13
Independent Claim
183 words
A method for making a capacitor for use with a metal oxide semiconductor field effect transistor, comprising the steps of: providing a silicon on insulator substrate having a first region for use as a first plate of said capacitor and a second region for forming said transistor; isolating said first region; forming a first oxide layer on said substrate; implanting phosphorus ions through said first oxide layer into said first region to provide a first concentration of said phosphorus ions within said first region; removing said first oxide layer; forming a second oxide layer over said first and second regions with said second oxide layer over said first region having a first thickness and said second oxide layer over said second region having a second thickness, with said first thickness exceeding said second thickness by not more than 30 percent; depositing a polysilicon over said first and second regions layer; and removing a portion of said polysilicon layer and of said second oxide layer to define a gate for said transistor and to define a dielectric and a second plate of said capacitor.
Claim 14
Independent Claim
183 words
A method for making a capacitor for use with a metal oxide semiconductor field effect transistor, comprising the steps of: providing a silicon on insulator substrate having a first region for use as a first plate of said capacitor and a second region for forming said transistor; isolating said first region; forming a first oxide layer on said substrate; implanting phosphorus ions through said first oxide layer into said first region to provide a first concentration of said phosphorus ions within said first region; removing said first oxide layer; forming a second oxide layer over said first and second regions with said second oxide layer over said first region having a first thickness and said second oxide layer over said second region having a second thickness, with said first thickness exceeding said second thickness by not more than 30 percent; depositing a polysilicon over said first and second regions layer; and removing a portion of said polysilicon layer and of said second oxide layer to define a gate for said transistor and to define a dielectric and a second plate of said capacitor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-07-03 | 1999-01-02 | 1999-07-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-07-03 | 2003-01-02 | 2003-07-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-07-03 | 2007-01-02 | 2007-07-04 | $7700.00 | Window Closed / Lapsed |