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US5428885A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making a multilayer hybrid circuit

Assignee: TDK Corp
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Filing: 1993-01-27
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Granted: 1995-07-04
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Expires: 2013-01-27
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Abstract

Abstract A multilayer hybrid circuit, which looks like a conventional printed circuit board, has a laminated body having at least one of a plurality of dielectric layers, magnetic layers, and conductive patterns, composing a capacitor, an inductor, and a resistor, and mounts a semiconductor chip. An external connection is effected by side terminals positioned on side walls of the laminated body. In one embodiment, said laminated body and said semiconductor chip are molded together by plastics so that the result looks as if a conventional semiconductor chip. In another embodiment, a resilient relay board is coupled with the laminated body when mounted on a mother board so that stress on the mother board is not applied directly to the laminated body.

Inventors

  • 👤 Minoru Takaya
  • 👤 Yoshinori Mochizuki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 19:56
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/464; H10W70/468; H05; H05K; H05K1/00; H05K1/16; H10W70/475; H10W90/00; H05K1/18; H05K1/181; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W74/00; H10W90/701; H10W90/751; H10W90/754; Y; Y10; Y10T; Y10T29/00; Y10T29/43; Y10T29/435; Y10T29/49; Y10T29/49002; Y10T29/4902; Y10T29/49082; Y10T29/49099

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 271 words
A method for producing a multi-layer hybrid circuit comprising the steps of; providing a laminated body having a plurality of passive elements including at least one selected from a capacitor layer and an inductor layer, and also including a resistor layer, said capacitor layer being produced by laminating a plurality of dielectric layers and conductive layers through thick film process so that said layers provide at least one capacitor, said inductor layer being produced by laminating a plurality of magnetic layers and U-shaped conductive layers through thick film process so that the combination of said U-shaped layers provide a coil and the combination of said coil and said magnetic layers provide an inductor, said resistor layer being produced by attaching an insulating layer on one surface of said laminated body which has at least one of said capacitor layer and said inductor layer, and attaching a resistive layer and conductive layer on said insulation layer through thick film process so that said resistor layer provides at least one resistor, laminating an inner wiring portion on said laminated body by laminating a plurality of insulation layers and flat conductive layers, said insulation layers having through holes for electrically coupling said conductive layers on different layers of said inner wiring portion to couple at least two of said passive elements, attaching a plurality of side terminals on sides of said laminated body for external connection of said passive elements and internal connection between said passive elements, and sintering said laminated body at about 800° C., all of the steps prior to the last step being performed without baking of the circuit being produced.
Claim 2
Independent Claim 271 words
A method for producing a multi-layer hybrid circuit comprising the steps of; providing a laminated body having a plurality of passive elements including at least one selected from a capacitor layer and an inductor layer, and also including a resistor layer, said capacitor layer being produced by laminating a plurality of dielectric layers and conductive layers through thick film process so that said layers provide at least one capacitor, said inductor layer being produced by laminating a plurality of magnetic layers and U-shaped conductive layers through thick film process so that the combination of said U-shaped layers provide a coil and the combination of said coil and said magnetic layers provide an inductor, said resistor layer being produced by attaching an insulating layer on one surface of said laminated body which has at least one of said capacitor layer and said inductor layer, and attaching a resistive layer and conductive layer on said insulation layer through thick film process so that said resistor layer provides at least one resistor, laminating an inner wiring portion on said laminated body by laminating a plurality of insulation layers and flat conductive layers, said insulation layers having through holes for electrically coupling said conductive layers on different layers of said inner wiring portion to couple at least two of said passive elements, attaching a plurality of side terminals on sides of said laminated body for external connection of said passive elements and internal connection between said passive elements, and sintering said laminated body at about 800° C., all of the steps prior to the last step being performed without baking of the circuit being produced.
Claim 3
Dependent Claim 91 words
A method for producing a multi-layer hybrid circuit according to claim 1, further comprising the steps of depositing a conductive film on one surface of said laminated body through thick film printing process, adhering an integrated circuit bare chip, heating the laminated body at 150 -160 C., placing the laminated body on a lead frame so that each of said side terminals couples with each lead terminal of said lead frame, molding the laminated body together with said bare chip with plastics, and removing the outer portion of said lead frame.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-07-03 1999-01-02 1999-07-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-07-03 2003-01-02 2003-07-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-07-03 2007-01-02 2007-07-04 $7700.00 Window Closed / Lapsed

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