US5428630A — System and method for verifying the integrity of …

Claim 1

Independent Claim 235 words

A read/write controller for a mass memory, said mass memory and said controller used in conjunction with a host processor, said controller comprising: a local memory that receives and stores a data block from said host processor, said data block comprising a sequence of data symbols of predetermined size; an encoder, coupled to said local memory, for encoding and re-encoding said stored data block with error correction data, said error correction data comprising a sequence of error correction symbols of predetermined size, said encoded data block comprising said data symbols and said error correction symbols; mass memory control means, coupled to said encoder, for controlling storage of said data and error correction symbols of said encoded data block in said mass memory and for controlling retrieval of said stored data and error correction symbols from said mass memory; a comparator coupled to said encoder and to said mass memory control means to compare each of data and error correction symbols retrieved from said mass memory with corresponding re-encoded ones of data and error correction symbols received from said encoder; and a decoder coupled to said comparator to decode the stream of symbols output therefrom, said decoder generating an error status signal when by decoding the stream of symbols from said comparator it determines that more than a predetermined threshold number of said retrieved data and error correction symbols are improperly stored in said mass memory.

Claim 2

Dependent Claim 235 words

A read/write controller for a mass memory, said mass memory and said controller used in conjunction with a host processor, said controller comprising: a local memory that receives and stores a data block from said host processor, said data block comprising a sequence of data symbols of predetermined size; an encoder, coupled to said local memory, for encoding and re-encoding said stored data block with error correction data, said error correction data comprising a sequence of error correction symbols of predetermined size, said encoded data block comprising said data symbols and said error correction symbols; mass memory control means, coupled to said encoder, for controlling storage of said data and error correction symbols of said encoded data block in said mass memory and for controlling retrieval of said stored data and error correction symbols from said mass memory; a comparator coupled to said encoder and to said mass memory control means to compare each of data and error correction symbols retrieved from said mass memory with corresponding re-encoded ones of data and error correction symbols received from said encoder; and a decoder coupled to said comparator to decode the stream of symbols output therefrom, said decoder generating an error status signal when by decoding the stream of symbols from said comparator it determines that more than a predetermined threshold number of said retrieved data and error correction symbols are improperly stored in said mass memory.

Claim 3

Dependent Claim 70 words

The read/write controller of claim 1 further comprising local memory control means for controlling storage of said data block in said local memory and controlling retrieval of said data block from said local memory, said local memory control means also for receiving said error status signal and transmitting in response a second error status signal to said host processor so as to prompt said host processor to undertake remedial action.

Claim 4

Dependent Claim 52 words

The read/write controller of claim 1 wherein: said error correction data provides information sufficient to correct a predefined maximum number of data and error correction symbols in said encoded data block; and said threshold number is greater than one and less than said predefined maximum number of data and error correction symbols.

Claim 5

Dependent Claim 26 words

The read/write controller of claim 1 wherein said encoder is a Reed-Solomon error correcting code encoder and said decoder is a Reed-Solomon error correcting code decoder.

Claim 6

Dependent Claim 62 words

The read/write controller of claim 4 wherein said comparator generates in response to each comparison an error flagging symbol of predetermined size, and wherein said decoder includes: a syndrome generator that receives said error flagging symbols and computes in response Reed-Solomon error syndromes; and an error correction vector generator that receives said error syndromes and generates in response said error status signal.

Claim 7

Dependent Claim 19 words

The read/write controller of claim 1 wherein said decoder includes an error monitor that generates said error status signal.

Claim 8

Dependent Claim 54 words

The read/write controller of claim 6 wherein said comparator generates in response to each comparison an error flagging symbol of predetermined size, and wherein said error monitor includes counting means for counting non-zero error flagging symbols generated by said comparator and for generating said error status signal when said count exceeds said threshold number.

Claim 9

Dependent Claim 58 words

The read/write controller of claim 1 wherein: said mass memory control means is also for retrieving said stored data and error correction symbols from said mass memory when requested by said host processor; and said decoder includes means for correcting ones of said requested retrieved data and error correction symbols that are improperly stored in said mass memory.

Claim 10

Dependent Claim 45 words

The read/write controller of claim 8 wherein said decoder corrects improperly stored ones of said requested retrieved data and error correction symbols when no more than said threshold number of said requested retrieved data and error correction symbols are improperly stored in said mass memory.

Claim 11

Dependent Claim 227 words

A read/write controller for a mass memory, said mass memory and said controller used in conjunction with a host processor, said controller comprising: a local memory that receives and stores a data block from said host processor, said data block comprising a sequence of data symbols of predetermined size; an encoder for encoding and re-encoding said stored data block with error correction data, said error correction data comprising a sequence of error correction symbols of predetermined size, said encoded data block comprising said data symbols and said error correction symbols; control means for controlling storage of said data and error correction symbols of said encoded data block in said mass memory and for controlling retrieval of said stored data and error correction symbols from said mass memory; a comparator coupled to said encoder and to said control means to compare each of data and error correction symbols retrieved from said mass memory with corresponding re-encoded ones of data and error correction symbols received from said encoder; and an error monitor coupled to said comparator to count the number of times the output thereof is non-zero, said monitor generating an error status signal when by counting the number of non-zero outputs of said comparator it determines that more than a predetermined threshold number of said retrieved data and error correction symbols are improperly stored in said mass memory.

Claim 12

Dependent Claim 227 words

A read/write controller for a mass memory, said mass memory and said controller used in conjunction with a host processor, said controller comprising: a local memory that receives and stores a data block from said host processor, said data block comprising a sequence of data symbols of predetermined size; an encoder for encoding and re-encoding said stored data block with error correction data, said error correction data comprising a sequence of error correction symbols of predetermined size, said encoded data block comprising said data symbols and said error correction symbols; control means for controlling storage of said data and error correction symbols of said encoded data block in said mass memory and for controlling retrieval of said stored data and error correction symbols from said mass memory; a comparator coupled to said encoder and to said control means to compare each of data and error correction symbols retrieved from said mass memory with corresponding re-encoded ones of data and error correction symbols received from said encoder; and an error monitor coupled to said comparator to count the number of times the output thereof is non-zero, said monitor generating an error status signal when by counting the number of non-zero outputs of said comparator it determines that more than a predetermined threshold number of said retrieved data and error correction symbols are improperly stored in said mass memory.

Claim 13

Dependent Claim 66 words

The read/out write controller of claim 10 further comprising local memory control means for controlling storage of said data block in said local memory and controlling retrieval of said data block from said local memory, said local memory control means also for receiving said error status signal and transmitting a second error status signal to said host processor so that said host processor undertakes remedial action.

Claim 14

Dependent Claim 64 words

The read/write controller of claim 10 wherein said comparator generates in response to each comparison an error flagging symbol of predetermined size, and wherein said error monitor includes: means for counting at least up to said threshold number the total number of non-zero error flagging symbols generated by said comparator and for generating said error status signal when said total exceeds said threshold number.

Claim 15

Dependent Claim 52 words

The read/write controller of claim 10 wherein: said error correction data provides information sufficient to correct a predefined maximum number of data and error correction symbols in said encoded data block; and said threshold number is greater than one and less than said predefined maximum number of data and error correction symbols.

Claim 16

Independent Claim 198 words

A method performed by a mass memory controller for verifying the integrity of a data block written to a mass memory, said mass memo used in conjunction with a host processor, said method performed by said mass memory controller comprising the steps of: receiving and storing said data block in a local memory, said data block comprising a sequence of data symbols of predetermined size; encoding said stored data block with error correction data, said error correction data comprising a sequence of error correction symbols of predetermined size, said encoded data block comprising said data symbols and said error correction symbols; storing said data and error correction symbols of said encoded data block in said mass memory; retrieving said stored data and error correction symbols from said mass memory; encoding said stored data block again; comparing the symbols in the encoded data block resulting from said second encoding step to the symbols in the encoded data block retrieved from said mass memory to determine how many of the corresponding symbols therein do not match; and generating a first error status signal when more than a predetermined threshold number of symbol mismatches has been determined in said comparing step.

Claim 17

Independent Claim 198 words

A method performed by a mass memory controller for verifying the integrity of a data block written to a mass memory, said mass memo used in conjunction with a host processor, said method performed by said mass memory controller comprising the steps of: receiving and storing said data block in a local memory, said data block comprising a sequence of data symbols of predetermined size; encoding said stored data block with error correction data, said error correction data comprising a sequence of error correction symbols of predetermined size, said encoded data block comprising said data symbols and said error correction symbols; storing said data and error correction symbols of said encoded data block in said mass memory; retrieving said stored data and error correction symbols from said mass memory; encoding said stored data block again; comparing the symbols in the encoded data block resulting from said second encoding step to the symbols in the encoded data block retrieved from said mass memory to determine how many of the corresponding symbols therein do not match; and generating a first error status signal when more than a predetermined threshold number of symbol mismatches has been determined in said comparing step.

Claim 18

Dependent Claim 24 words

The method of claim 14 further comprising the step of transmitting a second error status signal in response to said first error status signal.

Claim 19

Dependent Claim 51 words

The method of claim 14 wherein: said error correction data provides information sufficient to correct a predefined maximum number of data and error correction symbols in said encoded data block; and said threshold number is greater than one and less than said predefined maximum number of data and error correction symbols.

Claim 20

Dependent Claim 19 words

The method of claim 14 wherein said encoding steps encode said data block with a Reed-Solomon error correcting code.

Claim 21

Dependent Claim 66 words

The method of claim 17 wherein said step of generating said first error status signal includes the steps of: generating an error flagging symbol of predetermined size in response to each comparison performed in said comparing step; and generating Reed-Solomon error syndromes in response to said generated error flagging symbols; and wherein said first error status signal is generated in response to said generated error syndromes,

Claim 22

Dependent Claim 65 words

The method of claim 14 wherein said step of generating said first error status signal includes the steps of: generating an error flagging symbol of predetermined size in response to each comparison performed in said comparing step; counting up to said threshold number the total of non-zero error flagging symbols generated; and generating said first error status signal when said total exceeds said threshold number,

Claim 23

Dependent Claim 73 words

The method of claim 14 further comprising the steps of: retrieving said stored data and error correction symbols from said mass memory when requested by said host computer; and correcting ones of said requested retrieved data and error correction symbols that do not match corresponding symbols in the encoded data block resulting from said second encoding step only when no more than said threshold number of symbol mismatches is determined in said comparing.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1998-06-26	1998-12-26	1999-06-27	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2002-06-26	2002-12-26	2003-06-27	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2006-06-26	2006-12-26	2007-06-27	$7700.00	Window Closed / Lapsed

System and method for verifying the integrity of data written to a memory

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