Patent US5428240A successfully refreshed from Google Patents.
US5428240A
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Source/drain structural configuration for MOSFET integrated circuit devices
Assignee: United Microelectronics Corp
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Filing: 1994-07-07
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Granted: 1995-06-27
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Expires: 2014-07-07
Abstract
Abstract A source/drain structural configuration suitable for metal-oxide semiconductor field-effect transistors is provided, having a wedge-shaped configuration with a thickness that increases in the direction from its end near to one the channel of the transistor toward the other end. The source/drain configuration includes a shallow junction advantageously formed to reduce sheet resistance and prevent the hot carrier punchthrough effect. The wedge-shaped source/drain configuration is fabricated by depositing a dielectric layer, which is flowable under thermal treatment, after the formation of a polysilicon gate electrode. After annealing, the dielectric layer is etched to form a wedge-shaped mask. The resulting mask has a thickness that decreases in the direction from its one end near the gate electrode toward the other end. The presence of the wedge-shaped shielding masks facilitates the formation of a pair of wedge-shaped source/drain regions on the substrate via implementation of an ion implantation procedure. The wedge-shaped mask also assists in achieving improved step coverage for the deposition of the pre-metal dielectric layer.
Inventors
- 👤 Water Lur
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:22
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D30/0229; H10D30/60; H10D30/601; H10P; H10P30/00; H10P30/20; H10P30/22; H10D30/0212; Y; Y10; Y10S; Y10S438/00; Y10S438/965
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
219 words
A metal-oxide semiconductor field-effect transistor formed on a silicon substrate, comprising: a gate electrode configuration formed on the silicon substrate, said gate electrode configuration including: a gate oxide layer and a polysilicon gate layer, with an area of the silicon substrate underlying said gate electrode configuration providing a channel; a pair of lightly-doped source/drain regions formed on opposing ends of said channel in the silicon substrate; a pair of spacers formed on opposing side walls of said gate electrode configuration; a pair of wedge-shaped masks formed on the silicon substrate and contacting said pair of spacers formed on opposing side walls of said gate electrode configuration, said pair of wedge-shaped masks having a thickness that decreases in a direction from one end of said mask substantially adjacent to the pair of spacers formed on opposing side wails of said gate electrode configuration toward another end of said mask; and a pair of source/drain regions formed in the silicon substrate in regions outside of said lightly-doped source/drain regions and corresponding to said pair of wedge-shape masks, each of said pair of source/drain regions having a thickness that increases in a direction from one end of said region substantially adjacent to said pair of lightly-doped source/drain regions toward another end of said region, complementary to said thickness of said wedge-shaped mask.
Claim 2
Dependent Claim
219 words
A metal-oxide semiconductor field-effect transistor formed on a silicon substrate, comprising: a gate electrode configuration formed on the silicon substrate, said gate electrode configuration including: a gate oxide layer and a polysilicon gate layer, with an area of the silicon substrate underlying said gate electrode configuration providing a channel; a pair of lightly-doped source/drain regions formed on opposing ends of said channel in the silicon substrate; a pair of spacers formed on opposing side walls of said gate electrode configuration; a pair of wedge-shaped masks formed on the silicon substrate and contacting said pair of spacers formed on opposing side walls of said gate electrode configuration, said pair of wedge-shaped masks having a thickness that decreases in a direction from one end of said mask substantially adjacent to the pair of spacers formed on opposing side wails of said gate electrode configuration toward another end of said mask; and a pair of source/drain regions formed in the silicon substrate in regions outside of said lightly-doped source/drain regions and corresponding to said pair of wedge-shape masks, each of said pair of source/drain regions having a thickness that increases in a direction from one end of said region substantially adjacent to said pair of lightly-doped source/drain regions toward another end of said region, complementary to said thickness of said wedge-shaped mask.
Claim 3
Dependent Claim
42 words
The metal-oxide semiconductor field-effect transistor of claim 1, wherein the silicon substrate is a P-conductivity type silicon substrate, said pair of lightly-doped source/drain regions are N - -conductivity type regions, and said pair of source/drain regions are N + -conductivity type regions.
Claim 4
Dependent Claim
42 words
The metal-oxide semiconductor field-effect transistor of claim 1, wherein the silicon substrate is a N-conductivity type silicon substrate, said pair of lightly-doped source/drain regions are P - -conductivity type regions, and said pair of source/drain regions are P + -conductivity type regions.
Claim 5
Dependent Claim
31 words
The metal-oxide semiconductor field-effect transistor of claims 1, wherein said pair of wedge-shaped masks are selected from the group consisting of borophosphosilicate glass, borosilicate glass, phosphosilicate glass, spin-on glass, and polyimide.
Claim 6
Dependent Claim
128 words
A process for fabricating a metal-oxide a semiconductor field-effect transistor on a silicon substrate, comprising the steps of: (a) forming a gate on the silicon substrate; (b) implanting impurities into the silicon substrate, utilizing said gate as a mask, to form a pair of source/drain regions; (c) forming a pair of oxide spacers on opposing side walls of said gate electrode configuration; (d) depositing a dielectric layer on the silicon substrate, said oxide spacers, and said gate electrode configuration; (e) etching said dielectric layer to form a pair of wedge-shaped masks adjacent to said pair of oxide spacers, said wedge-shaped masks having a thickness that decreases in a direction away from said pair of oxide spacers; and (f) implanting impurities into the silicon substrate through said wedge-shaped masks.
Claim 7
Dependent Claim
128 words
A process for fabricating a metal-oxide a semiconductor field-effect transistor on a silicon substrate, comprising the steps of: (a) forming a gate on the silicon substrate; (b) implanting impurities into the silicon substrate, utilizing said gate as a mask, to form a pair of source/drain regions; (c) forming a pair of oxide spacers on opposing side walls of said gate electrode configuration; (d) depositing a dielectric layer on the silicon substrate, said oxide spacers, and said gate electrode configuration; (e) etching said dielectric layer to form a pair of wedge-shaped masks adjacent to said pair of oxide spacers, said wedge-shaped masks having a thickness that decreases in a direction away from said pair of oxide spacers; and (f) implanting impurities into the silicon substrate through said wedge-shaped masks.
Claim 8
Dependent Claim
46 words
The process for fabricating a metal-oxide semiconductor field-effect transistor of claim 5, wherein the silicon substrate is a P-conductivity type silicon substrate, said pair of source/drain regions are lightly-doped N - -conductivity type regions, and said pair of source/drain regions are N + -conductivity type regions.
Claim 9
Dependent Claim
46 words
The process for fabricating a metal-oxide semiconductor field-effect transistor of claim 5, wherein the silicon substrate is a N-conductivity type silicon substrate, said pair of lightly-doped source/drain regions are P - -conductivity type regions, and said pair of source/drain regions are P + -conductivity type regions.
Claim 10
Dependent Claim
35 words
The process for fabricating a metal-oxide semiconductor field-effect transistor of claims 5, wherein said pair of wedge-shaped masks are selected from the group consisting of borophosphosilicate glass, borosilicate glass, phosphosilicate glass, spin-on glass, and polyimide.
Claim 11
Dependent Claim
43 words
The process for fabricating a metal-oxide semiconductor field-effect transistor of claim 5, further comprising a step of depositing an etch-stopping layer having a thickness in a range of 100 Å to 300 Å prior to said step (d) of depositing said dielectric layer.
Claim 12
Dependent Claim
30 words
The process for fabricating a metal-oxide semiconductor field-effect transistor of claim 9, wherein said etch-stopping layer are selected from the group consisting of silicon nitride, boron nitride, and silicon dioxide.
Claim 13
Dependent Claim
31 words
The process for fabricating a metal-oxide semiconductor field-effect transistor of claim 5, further comprising a step of forming a metal salicide layer on said gate electrode configuration and said source/drain regions.
References Cited (Backward Citations)
US5234852A
Cited
US5278441A
Cited
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