Patent US5424239A successfully refreshed from Google Patents.
US5424239A
Expired / Lapsed
US
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Method of fabricating precisely matched polysilicon resistors
Assignee: Texas Instruments Inc
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Filing: 1994-02-01
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Granted: 1995-06-13
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Expires: 2014-02-01
Abstract
Abstract A method of fabricating a resistor which comprises the steps of providing a semiconductor substrate, preferably silicon, forming a layer of oxide over the substrate, providing on the layer of oxide a region of material having a substantially higher resistance in the undoped state than in the doped state, preferably polysilicon, patterning a region over the material to expose predetermined regions of the material, doping the exposed regions of the material to a predetermined doping level substantially greater than the doping level of the original material, masking the doped regions and a portion of the previously unexposed regions of the material on spaced apart portions of the doped regions and etching away the exposed region of material external to the doped regions and external to the portion of the previously unexposed regions of the material on spaced apart portions of the doped regions.
Inventors
- 👤 Frank J. Sweeney
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 19:38
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
156 words
A method of fabricating a resistor comprising the steps of: (a) providing a resistive layer of material having a substantially higher resistance in the undoped state than in the doped state; (b) forming a first patterned mask over said resistive layer to expose regions of said resistive layer; (c) doping the exposed regions of said material to a doping level substantially greater than the doping level of said resistive layer in step (a); (d) forming a second patterned mask covering said regions, said second patterned mask extending beyond said regions such that none of the doped regions of said resistive layer are exposed; (e) etching away the portion of said resistive layer not covered by said second patterned mask; and (f) forming spaced conductive contacts on said doped regions of said resistive layer such that the resistance between said spaced conductive contacts is primarily determined by the resistivity of the doped regions of said resistive layer.
Claim 2
Independent Claim
156 words
A method of fabricating a resistor comprising the steps of: (a) providing a resistive layer of material having a substantially higher resistance in the undoped state than in the doped state; (b) forming a first patterned mask over said resistive layer to expose regions of said resistive layer; (c) doping the exposed regions of said material to a doping level substantially greater than the doping level of said resistive layer in step (a); (d) forming a second patterned mask covering said regions, said second patterned mask extending beyond said regions such that none of the doped regions of said resistive layer are exposed; (e) etching away the portion of said resistive layer not covered by said second patterned mask; and (f) forming spaced conductive contacts on said doped regions of said resistive layer such that the resistance between said spaced conductive contacts is primarily determined by the resistivity of the doped regions of said resistive layer.
Claim 3
Dependent Claim
11 words
The method of claim 1 wherein said resistive layer is polysilicon.
Claim 4
Dependent Claim
37 words
The method of claim 1 further including, prior to step (a), the steps of providing a semiconductor substrate, forming a layer of oxide over said substrate, said resistive layer being then formed on said layer of oxide.
Claim 5
Independent Claim
150 words
A method of fabricating a resistor comprising the steps of: (a) providing a polycrystalline silicon layer; (b) forming a first patterned mask over said polycrystalline silicon layer to expose regions of said polycrystalline silicon layer; (c) doping the exposed regions of said polycrystalline silicon layer to a doping level substantially greater than the doping level of said polycrystalline silicon layer in step (a); (d) forming a second patterned mask covering said regions, said second patterned mask extending beyond said regions such that none of the doped regions of said polycrystalline silicon layer are exposed; (e) etching away the portion of said polycrystalline silicon layer not covered by said second patterned mask; and (f) forming spaced conductive contacts on said doped regions of said polycrystalline silicon layer such that the resistance between said spaced conductive contacts is primarily determined by the resistivity of the doped regions of said polycrystalline silicon layer.
Claim 6
Independent Claim
150 words
A method of fabricating a resistor comprising the steps of: (a) providing a polycrystalline silicon layer; (b) forming a first patterned mask over said polycrystalline silicon layer to expose regions of said polycrystalline silicon layer; (c) doping the exposed regions of said polycrystalline silicon layer to a doping level substantially greater than the doping level of said polycrystalline silicon layer in step (a); (d) forming a second patterned mask covering said regions, said second patterned mask extending beyond said regions such that none of the doped regions of said polycrystalline silicon layer are exposed; (e) etching away the portion of said polycrystalline silicon layer not covered by said second patterned mask; and (f) forming spaced conductive contacts on said doped regions of said polycrystalline silicon layer such that the resistance between said spaced conductive contacts is primarily determined by the resistivity of the doped regions of said polycrystalline silicon layer.
Claim 7
Dependent Claim
17 words
A method as in claim 4 wherein said second patterned mask extends beyond said regions by 5μ.
Claim 8
Dependent Claim
17 words
A method as in claim 4 wherein said second patterned mask extends beyond said regions by 1μ.
Claim 9
Independent Claim
166 words
A method of fabricating a resistor comprising the steps of: (a) providing a substrate; (b) forming an insulating layer on said substrate; (c) forming a polycrystalline silicon layer on said insulating layer; (d) forming a first patterned mask over said polycrystalline silicon layer to expose regions of said polycrystalline silicon layer; (e) doping the exposed regions of said polycrystalline silicon layer to a doping level substantially greater than the doping level of said polycrystalline silicon layer in step (c); (f) forming a second patterned mask covering said regions, said second patterned mask extending beyond said regions such that none of the doped regions of said polycrystalline silicon layer are exposed; (g) etching away the portion of said polycrystalline silicon layer not covered by said second patterned mask; and (h) forming spaced conductive contacts on said doped regions of said polycrystalline silicon layer such that the resistance between said spaced conductive contacts is primarily determined by the resistivity of the doped regions of said polycrystalline silicon layer.
Claim 10
Independent Claim
166 words
A method of fabricating a resistor comprising the steps of: (a) providing a substrate; (b) forming an insulating layer on said substrate; (c) forming a polycrystalline silicon layer on said insulating layer; (d) forming a first patterned mask over said polycrystalline silicon layer to expose regions of said polycrystalline silicon layer; (e) doping the exposed regions of said polycrystalline silicon layer to a doping level substantially greater than the doping level of said polycrystalline silicon layer in step (c); (f) forming a second patterned mask covering said regions, said second patterned mask extending beyond said regions such that none of the doped regions of said polycrystalline silicon layer are exposed; (g) etching away the portion of said polycrystalline silicon layer not covered by said second patterned mask; and (h) forming spaced conductive contacts on said doped regions of said polycrystalline silicon layer such that the resistance between said spaced conductive contacts is primarily determined by the resistivity of the doped regions of said polycrystalline silicon layer.
Claim 11
Dependent Claim
17 words
A method as in claim 7 wherein said second patterned mask extends beyond said regions by 5μ.
Claim 12
Dependent Claim
17 words
A method as in claim 7 wherein said second patterned mask extends beyond said regions by 1μ.
Claim 13
Dependent Claim
12 words
A method as in claim 7 wherein said substrate comprises crystalline silicon.
Claim 14
Dependent Claim
13 words
A method as in claim 7 wherein said insulating layer comprises silicon dioxide.
References Cited (Backward Citations)
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-06-12 | 1998-12-12 | 1999-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-06-12 | 2002-12-12 | 2003-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-06-12 | 2006-12-12 | 2007-06-13 | $7700.00 | Window Closed / Lapsed |