Patent US5422293A successfully refreshed from Google Patents.
US5422293A
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US
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Method for manufacturing a TFT panel
Assignee: Casio Computer Co Ltd
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Filing: 1992-12-18
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Granted: 1995-06-06
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Expires: 2012-12-18
Abstract
Abstract A TFT panel is manufactured by a process of forming an oxide voltage-apply lines, gate lines, and capacitor lines on an insulating substrate, and a process of forming thin-film transistors, pixel electrodes, data lines, and ground lines. In a state that one end of the gate line and both ends of the capacitor line are connected to the oxide voltage-apply line, oxide films are formed on the surfaces of the gate line and the capacitor line by anodization. After forming the oxide film, the gate line and the capacitor line are electrically separated from the oxide voltage-apply line.
Inventors
- 👤 Naohiro Konya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 19:45
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/40; G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; G02F1/136213; G02F1/136286; H10D86/441; H10D86/443; H10D86/481; H10D86/60; Y; Y10; Y10S; Y10S148/00; Y10S148/117
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
265 words
A method for manufacturing a TFT panel comprising: a first step of forming gate lines, capacitor lines, and two oxide voltage-apply lines on a substrate such that the gate lines are connected to the oxide voltage-apply lines and both ends of each of the capacitor lines are connected to the gate lines; a second step of applying a voltage to the oxide voltage-apply lines for forming oxide films on surfaces of the gate lines and the capacitor lines by anodization; a third step of forming thin-film transistors, pixel electrodes connected to the thin-film transistors, data lines connected to the thin-film transistors, and a ground line connected to the capacitor lines; and a fourth step of separating the gate lines from the oxide voltage-apply lines and separating the capacitor lines from the gate lines in a process after the second step of forming the oxide films; wherein: the first step includes a process of forming the oxide voltage-apply lines on the substrate with the gate line arranged between the oxide voltage-apply lines and connected to the oxide voltage-apply lines, and the capacitor lines arranged between the oxide voltage apply lines and connected to the oxide voltage-apply lines; the second step includes a process of covering contact points between the capacitor lines and the gate lines with a resist, and a process of anodizing the exposed surfaces of the capacitor lines and the gate lines; and the fourth step includes a process of separating the capacitor lines from the gate lines by etching non-anodized portions of the contact points between the capacitor lines and the gate lines.
Claim 2
Independent Claim
265 words
A method for manufacturing a TFT panel comprising: a first step of forming gate lines, capacitor lines, and two oxide voltage-apply lines on a substrate such that the gate lines are connected to the oxide voltage-apply lines and both ends of each of the capacitor lines are connected to the gate lines; a second step of applying a voltage to the oxide voltage-apply lines for forming oxide films on surfaces of the gate lines and the capacitor lines by anodization; a third step of forming thin-film transistors, pixel electrodes connected to the thin-film transistors, data lines connected to the thin-film transistors, and a ground line connected to the capacitor lines; and a fourth step of separating the gate lines from the oxide voltage-apply lines and separating the capacitor lines from the gate lines in a process after the second step of forming the oxide films; wherein: the first step includes a process of forming the oxide voltage-apply lines on the substrate with the gate line arranged between the oxide voltage-apply lines and connected to the oxide voltage-apply lines, and the capacitor lines arranged between the oxide voltage apply lines and connected to the oxide voltage-apply lines; the second step includes a process of covering contact points between the capacitor lines and the gate lines with a resist, and a process of anodizing the exposed surfaces of the capacitor lines and the gate lines; and the fourth step includes a process of separating the capacitor lines from the gate lines by etching non-anodized portions of the contact points between the capacitor lines and the gate lines.
Claim 3
Independent Claim
262 words
A method for manufacturing a TFT panel comprising: a first step of forming gate lines, capacitor lines, and two oxide voltage-apply lines on an insulating substrate such that the gate lines are connected to the oxide voltage-apply lines, and the capacitor lines are connected to the gate lines; a second step of applying a voltage to the oxide voltage-apply lines for generating oxide films on at least the surfaces of the gate lines and the capacitor lines by anodization; a third step of forming thin-film transistors including a gate insulating film and a protecting film, pixel electrodes connected to the thin-film transistors, data lines connected to the thin-film transistors, and a ground line connected to the capacitor lines; and a fourth step of separating the capacitor lines, the gate lines and the oxide voltage-apply lines from each other in a step after the second step and; wherein: the second step includes a process of covering contact points between the capacitor lines and the gate lines with a resist, and a process of anodizing the exposed surfaces of the capacitor lines and the gate lines; and the fourth step includes a process of removing gate insulating films formed on the contact points between the capacitor lines and the gate lines and the protecting films formed on the gate insulating films, and a process of separating the capacitor lines from the gate lines by removing non-anodized portions of the contact points at the same time with etching a conductive film formed after the process of removing the gate insulating films and the protecting films.
Claim 4
Independent Claim
262 words
A method for manufacturing a TFT panel comprising: a first step of forming gate lines, capacitor lines, and two oxide voltage-apply lines on an insulating substrate such that the gate lines are connected to the oxide voltage-apply lines, and the capacitor lines are connected to the gate lines; a second step of applying a voltage to the oxide voltage-apply lines for generating oxide films on at least the surfaces of the gate lines and the capacitor lines by anodization; a third step of forming thin-film transistors including a gate insulating film and a protecting film, pixel electrodes connected to the thin-film transistors, data lines connected to the thin-film transistors, and a ground line connected to the capacitor lines; and a fourth step of separating the capacitor lines, the gate lines and the oxide voltage-apply lines from each other in a step after the second step and; wherein: the second step includes a process of covering contact points between the capacitor lines and the gate lines with a resist, and a process of anodizing the exposed surfaces of the capacitor lines and the gate lines; and the fourth step includes a process of removing gate insulating films formed on the contact points between the capacitor lines and the gate lines and the protecting films formed on the gate insulating films, and a process of separating the capacitor lines from the gate lines by removing non-anodized portions of the contact points at the same time with etching a conductive film formed after the process of removing the gate insulating films and the protecting films.
Claim 5
Dependent Claim
91 words
The method for manufacturing the TFT panel according to claim 2, wherein: the first step includes forming the two oxide voltage-apply lines on the insulating substrate, such that each of the gate lines are arranged between the oxide voltage-apply lines; each of the gate lines has an end which is connected to the oxide voltage-apply lines; each of the capacitor lines is arranged between the two oxide voltage-apply lines; and each of the capacitor lines has an end which is connected to a respective one or two of the gate lines.
Claim 6
Dependent Claim
24 words
The method for manufacturing the TFT panel according to claim 2, wherein the fourth step is carried out between the second and third steps.
Claim 7
Dependent Claim
34 words
The method for manufacturing the TFT panel according to claim 2, wherein the fourth step is carried out at the same time with a process of etching the earth line of the third step.
Claim 8
Dependent Claim
28 words
The method for manufacturing the TFT panel according to claim 2, wherein the fourth step includes a process of separating the oxide voltage-apply lines from the gate lines.
Claim 9
Independent Claim
163 words
A method for manufacturing a TFT panel comprising: a first step of forming two oxide voltage-apply lines, gate lines provided between the two oxide voltage-apply lines and each gate line including a terminal which is wider than other portions thereof, capacitor lines provided between the two oxide voltage-apply lines on an insulating substrate such that each of the gate lines is connected to a corresponding one of the oxide voltage-apply lines, and each of the capacitor lines is connected to the gate lines at both ends of the capacitor lines; a second step of applying a voltage to the oxide voltage-apply lines and anodizing surfaces of the gate lines and the capacitor lines; a third step of forming thin-film transistors, pixel electrodes connected to the thin-film transistors, data lines connected to the thin-film transistors, and a ground line connected to the capacitor lines; and a fourth step of separating the capacitor lines, the gate lines and the oxide voltage-apply lines from one another.
Claim 10
Independent Claim
163 words
A method for manufacturing a TFT panel comprising: a first step of forming two oxide voltage-apply lines, gate lines provided between the two oxide voltage-apply lines and each gate line including a terminal which is wider than other portions thereof, capacitor lines provided between the two oxide voltage-apply lines on an insulating substrate such that each of the gate lines is connected to a corresponding one of the oxide voltage-apply lines, and each of the capacitor lines is connected to the gate lines at both ends of the capacitor lines; a second step of applying a voltage to the oxide voltage-apply lines and anodizing surfaces of the gate lines and the capacitor lines; a third step of forming thin-film transistors, pixel electrodes connected to the thin-film transistors, data lines connected to the thin-film transistors, and a ground line connected to the capacitor lines; and a fourth step of separating the capacitor lines, the gate lines and the oxide voltage-apply lines from one another.
Claim 11
Dependent Claim
42 words
The method for manufacturing the TFT panel according to claim 7, wherein said gate lines have first gate lines connected to one of the two oxide voltage-apply lines, and second gate lines connected to the other of the two oxide voltage-apply lines.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-06-05 | 1998-12-05 | 1999-06-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-06-05 | 2002-12-05 | 2003-06-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-06-05 | 2006-12-05 | 2007-06-06 | $7700.00 | Window Closed / Lapsed |