Arrangement for establishing a data pipeline in a data processing system employing multiple processors

Claim 2

An arrangement for establishing a data pipeline between first and second electronic processors, said arrangement comprising first means in said first processor, responsive to receipt of a request identifying particular data associated with said second processor, for dynamically constructing a sequence of commands including commands operative for establishing first and second communications paths forming said data pipeline, second means in said first processor, responsive to a first one of said commands, for causing said first processor to establish said first communications path from said first processor to said second processor, and, responsive to establishing said first communications path, for deleting said first one of said commands from said sequence to form a remainder sequence of commands and for passing the remainder sequence to said second processor via said first communications path, and means in said second processor for receiving said remainder sequence via said first communications path, and for executing ones of said commands in the order that they are contained in said received remainder sequence, said ones of said commands respectively causing said means in said second processor to unload said data from a memory associated with said second processor, establish said second communications path from said second processor to said first processor, and pass said data via said second communications path to said first processor.

Claim 3

The arrangement set forth in claim 1 wherein said data comprises a plurality of fragments of data, wherein said second processor retains a copy of said received remainder sequence and wherein said means in said second processor includes means, responsive to particular options associated with individual ones of said ones of said commands, for repeatedly executing said individual ones of said commands in order to unload respective ones of said fragments of data from said memory and pass each such fragment to said first processor via said second communications path.

Claim 4

The arrangement set forth in claim 1 wherein said second processor further includes means, responsive to said received remainder sequence containing a first command, for terminating said first communications path, and for then deleting said first command from said remainder sequence.

Claim 5

The arrangement set forth in claim 2 wherein said second processor further includes means, responsive to said remainder sequence containing at least one command operative for terminating said second communications path and responsive to the last of said fragments being passed to said first processor, for terminating said second communications path.

Claim 6

The arrangement set forth in claim 1 wherein said first and second communications paths are respective telephone line connections.

Claim 7

An arrangement for establishing a data pipeline between a source of particular data and a recipient of said data, said recipient and said source being associated with first and second electronic processors, respectively, said data pipeline being formed from first and second communications paths, said arrangement comprising first means in said first processor, responsive to receipt of a request requesting said data, for dynamically constructing a series of commands operative for respectively controlling the operation of said first and second processors in order to deliver said data to said recipient, second means in said first processor, responsive to a first one of said series of commands, for establishing said first communications path from said first processor to said second processor, for deleting said first command from said series to form a resulting series and for passing the resulting series to said second processor via said first communications path, first means in said second processor responsive to receipt of said resulting series, for executing ones of said commands in the order that they are contained in said resulting series, and second means in said second processor, responsive to the execution of each of said ones of said commands, for unloading said data from a memory contained in said second processor, for establishing said second communications path from said second processor to said first processor and for passing said data to said first processor for delivery to said recipient.

Claim 8

An arrangement for establishing a data pipeline between a source of particular data and a recipient of said data, said recipient and said source being associated with first and second electronic processors, respectively, said data pipeline being formed from first and second communications paths, said arrangement comprising first means in said first processor, responsive to receipt of a request requesting said data, for dynamically constructing a series of commands operative for respectively controlling the operation of said first and second processors in order to deliver said data to said recipient, second means in said first processor, responsive to a first one of said series of commands, for establishing said first communications path from said first processor to said second processor, for deleting said first command from said series to form a resulting series and for passing the resulting series to said second processor via said first communications path, first means in said second processor responsive to receipt of said resulting series, for executing ones of said commands in the order that they are contained in said resulting series, and second means in said second processor, responsive to the execution of each of said ones of said commands, for unloading said data from a memory contained in said second processor, for establishing said second communications path from said second processor to said first processor and for passing said data to said first processor for delivery to said recipient.

Claim 9

The arrangement set forth in claim 6 wherein said particular data comprises a plurality of fragments of data and wherein said second means in said second processor includes means, responsive to particular options associated with said ones of said commands for repeatedly executing said ones of said commands in accordance with said options in order to unload respective ones of said fragments of data from said memory and pass each such fragment to said first processor via said second communications path.

Claim 10

The arrangement set forth in claim 6 wherein said first means in said second processor includes means, operative responsive to a command positioned first in said received resulting series, for terminating said first communications path and deleting the first command from said resulting series so that other ones of said ones of said commands may be executed.

Claim 11

The arrangement set forth in claim 6 wherein said first and second communications paths are respective telephone line connections.

Claim 12

The arrangement set forth in claim 6 wherein said second means in said second processor includes means, responsive to the execution of each of said ones of said commands, for deleting said ones of said commands from said resulting series as they are executed and for then executing the command that is positioned first in said series following each such deletion.