US5412337A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device providing reliable conduction test of all terminals
Assignee: Fujitsu Ltd
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Filing: 1994-08-30
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Granted: 1995-05-02
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Expires: 2014-08-30
Abstract
Abstract A semiconductor device is disclosed which is directed to drastically reduce a conduction test time by reliably executing the conduction test of all terminals in a lump. The invention discloses the semiconductor device including a first power supply terminal, a second power supply terminal having a lower potential than the first power supply terminal, an internal circuit portion to which the first and second power supply terminals are connected, and an input signal terminal group and an output signal terminal group each connected to the internal circuit portion, wherein a first voltage supply source and a second voltage supply source having a predetermined potential difference from the first voltage supply source are disposed, a switching device is interposed between the first and second voltage supply sources, and the switching device is turned ON and OFF in accordance with the existence of a voltage applied to each of the terminals described above.
Inventors
- 👤 Sinsuke Kumakura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 22:55
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/30; G01R31/3004; G01R31/50; G01R31/66
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
194 words
A semiconductor device including an internal circuit, a first power supply terminal receiving a first high potential, a second power supply terminal receiving a second high potential and connected to said internal circuit to serve as a high potential power supply terminal thereof, a third power supply terminal receiving a third potential which is lower than any one of said first and second high potentials and connected to said internal circuit to serve as a low potential power supply terminal thereof and signal terminals including a group of input terminals and a group of output terminals each connected to said internal circuit, wherein said first power supply terminal is connected to said third power supply terminal by at least one switching device and a resistance is placed therebetween, and said switching device is connected to a plurality of terminals selected from said group of input signal terminals, said group of output signal terminals and said second power supply terminal so that said switching device can only be turned ON when all of said selected terminals are simultaneously brought into contact with a plurality of test probes, corresponding to each one of said selected terminals.
Claim 2
Dependent Claim
194 words
A semiconductor device including an internal circuit, a first power supply terminal receiving a first high potential, a second power supply terminal receiving a second high potential and connected to said internal circuit to serve as a high potential power supply terminal thereof, a third power supply terminal receiving a third potential which is lower than any one of said first and second high potentials and connected to said internal circuit to serve as a low potential power supply terminal thereof and signal terminals including a group of input terminals and a group of output terminals each connected to said internal circuit, wherein said first power supply terminal is connected to said third power supply terminal by at least one switching device and a resistance is placed therebetween, and said switching device is connected to a plurality of terminals selected from said group of input signal terminals, said group of output signal terminals and said second power supply terminal so that said switching device can only be turned ON when all of said selected terminals are simultaneously brought into contact with a plurality of test probes, corresponding to each one of said selected terminals.
Claim 3
Dependent Claim
41 words
A semiconductor device according to claim 1, wherein, when said switching device is turned ON, an electric current to be detected flows from said first power supply terminal to said third power supply terminal through said switching device and said resistance.
Claim 4
Dependent Claim
80 words
A semiconductor device according to claim 1, wherein said switching device is controlled by a processing circuit connected to said plurality of terminals selected from said group of input signal terminals, said group of output signal terminals and said second power supply terminal, said processing circuit processing data representing the existence of said potential at each of said selected terminals and outputting a control signal for controlling said switching device when all of said selected terminals output said potential, simultaneously.
Claim 5
Dependent Claim
47 words
A semiconductor device according to claim 3, wherein said processing circuit comprises an AND gate circuit, having each of said terminals selected from said group of input signal terminals, said group of output terminals and said second power supply terminal connected to a respective input terminal thereof.
Claim 6
Dependent Claim
14 words
A semiconductor device according to claim 2, wherein said switching device comprises a MOSFET.
Claim 7
Dependent Claim
44 words
A semiconductor device according to claim 1, wherein said at least one switching device comprises a plurality of switching devices provided between said first power supply terminal and said third power supply terminal, each of which are serially arranged with respect to each other.
Claim 8
Dependent Claim
50 words
A semiconductor device according to claim 6, wherein each of, said switching devices is connected to a respective one of said terminals selected from said input and output signal terminals and said second power supply terminal and controlled in accordance with the existence of said potential applied to each terminal.
Claim 9
Dependent Claim
49 words
A semiconductor device according to claim 2, wherein said current flowing from said first power supply terminal to said third power supply terminal through said switching device and said resistance is detected by a conduction test means when test probes are connected to said at least one switching device.
Claim 10
Dependent Claim
32 words
A semiconductor device according to claim 8, wherein said conduction test means comprises an ammeter or a DC unit connected between said first power supply terminal and said third power supply terminal.
Claim 11
Dependent Claim
162 words
A semiconductor device including an internal circuit, a first power supply terminal receiving a high potential and connected to said internal circuit to serve as a high potential power supply terminal thereof, a second power supply terminal receiving a low potential and connected to said internal circuit to serve as a low potential power supply terminal thereof and signal terminals including a group of input terminals and a group of output terminals each connected to said internal circuit, wherein said first power supply terminal is connected to said third power supply terminal through a plurality of switching devices being serially arranged with each other and a resistance, said resistance being coupled between said third power supply terminal and said switching devices, and each of said switching devices is connected to a respective one of said input and output terminals, and each of said switching devices is turned ON and OFF in accordance with the existence of a potential applied to said terminal.
Claim 12
Dependent Claim
162 words
A semiconductor device including an internal circuit, a first power supply terminal receiving a high potential and connected to said internal circuit to serve as a high potential power supply terminal thereof, a second power supply terminal receiving a low potential and connected to said internal circuit to serve as a low potential power supply terminal thereof and signal terminals including a group of input terminals and a group of output terminals each connected to said internal circuit, wherein said first power supply terminal is connected to said third power supply terminal through a plurality of switching devices being serially arranged with each other and a resistance, said resistance being coupled between said third power supply terminal and said switching devices, and each of said switching devices is connected to a respective one of said input and output terminals, and each of said switching devices is turned ON and OFF in accordance with the existence of a potential applied to said terminal.
Claim 13
Dependent Claim
13 words
A semiconductor device according to claim 10, wherein said switching device comprises MOSFET.
Claim 14
Dependent Claim
43 words
A semiconductor device according to claim 11, wherein when all of said switching devices are turned ON, an electric current to be detected flows from said second power supply terminal to said second power supply terminal through said switching device and said resistance.
Claim 15
Dependent Claim
48 words
A semiconductor device according to claim 12, wherein said current flowing from said first power supply terminal to said second power supply terminal through said switching devices and said resistance, is detected by conduction test means when test probes are connected to said at least one switching device.
Claim 16
Dependent Claim
32 words
A semiconductor device according to claim 13, wherein said conduction test means comprises an ammeter or a DC unit connected between said first power supply terminal and said second power supply terminal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-05-01 | 1998-10-31 | 1999-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-01 | 2002-10-31 | 2003-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-01 | 2006-10-31 | 2007-05-02 | $7700.00 | Window Closed / Lapsed |