Method for forming a gate electrode having a polycide structure

Claim 1

A method for forming a gate electrode having a polycide structure comprises: sequentially forming a first thermal oxide film and a photoresist on a silicon substrate; patterning said photoresist to expose a portion of said first thermal oxide film; etching said first thermal oxide film thus exposed and said silicon substrate with a desired depth; removing said photoresist on said first thermal oxide film; forming a second thermal oxide film on the entire surface of the resulting structure including said first thermal oxide film and said silicon substrate and implanting a low concentration impurity on the said silicon substrate, thereby forming first impurity regions; removing said first thermal oxide film and said second thermal oxide film and forming a gate oxide film on the entire surface of said silicon substrate on which impurity is implanted; sequentially forming a doped polysilicon film and silicide film on said gate oxide film and patterning said doped polysilicon film and silicide film, thereby forming a gate electrode; and forming a third thermal oxide film formed on the entire surface of the resulting structure including said gate oxide film, said doped polysilicon film and said silicide film and implanting a high concentration impurity on said silicon substrate, thereby forming second impurity regions.

Claim 2

A method for forming a gate electrode having a polycide structure comprises: sequentially forming a first thermal oxide film and a photoresist on a silicon substrate; patterning said photoresist to expose a portion of said first thermal oxide film; etching said first thermal oxide film thus exposed and said silicon substrate with a desired depth; removing said photoresist on said first thermal oxide film; forming a second thermal oxide film on the entire surface of the resulting structure including said first thermal oxide film and said silicon substrate and implanting a low concentration impurity on the said silicon substrate, thereby forming first impurity regions; removing said first thermal oxide film and said second thermal oxide film and forming a gate oxide film on the entire surface of said silicon substrate on which impurity is implanted; sequentially forming a doped polysilicon film and silicide film on said gate oxide film and patterning said doped polysilicon film and silicide film, thereby forming a gate electrode; and forming a third thermal oxide film formed on the entire surface of the resulting structure including said gate oxide film, said doped polysilicon film and said silicide film and implanting a high concentration impurity on said silicon substrate, thereby forming second impurity regions.