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US5406222A Expired / Lapsed US ⏱️ 0.0 years remaining

High gain transistor amplifier

Assignee: Analog Devices Inc
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Filing: 1993-12-22
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Granted: 1995-04-11
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Expires: 2013-12-22
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Abstract

Abstract A high gain transistor amplifier with internal balancing bias having a common mode input range which includes a supply rail includes a differential to single-ended converting input stage including at least one pair of transistors, each transistor having first and second current terminals and a control terminal; input means for providing an input signal to the first current terminals of the transistors; a voltage amplifier stage for providing an amplified output of the input signal, the voltage amplifier stage including at least one transistor having a control terminal; and a biasing circuit responsive to the voltage amplifier stage for maintaining balanced currents between the control terminal of the voltage amplifier stage and the control terminals of the differential to single-ended converting input stage, the biasing circuit being connected to the second current terminals of each transistor pair and the voltage amplifier stage being connected to one of the second current terminals so that the first terminal may be driven in a common mode potential range which includes a supply rail.

Inventors

  • 👤 A. Paul Brokaw

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-10 01:16
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45484; H03F3/45547; H03F3/45551; H03F3/45569; H03F3/45076; H03F3/4508; H03F3/4517

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 169 words
A high gain transistor amplifier with internal balancing bias having a common mode input range which includes a supply rail comprising: a differential to single-ended converting input stage, including at least one pair of transistors, each transistor having first and second current terminals and a control terminal; input means for providing an input signal to the first current terminals of the transistors; a voltage amplifier stage for providing an amplified output of the input signal, said voltage amplifier stage including at least one transistor having a control terminal; and a biasing circuit, responsive to said voltage amplifier stage, for maintaining balanced currents between said control terminal of said voltage amplifier stage and said control terminals of said differential to single-ended converting input stage, said biasing circuit being connected to the second current terminals of each transistor and said voltage amplifier stage being connected to one of said second current terminals so that said first terminals may be driven in a common mode potential range which includes a supply rail.
Claim 2
Dependent Claim 169 words
A high gain transistor amplifier with internal balancing bias having a common mode input range which includes a supply rail comprising: a differential to single-ended converting input stage, including at least one pair of transistors, each transistor having first and second current terminals and a control terminal; input means for providing an input signal to the first current terminals of the transistors; a voltage amplifier stage for providing an amplified output of the input signal, said voltage amplifier stage including at least one transistor having a control terminal; and a biasing circuit, responsive to said voltage amplifier stage, for maintaining balanced currents between said control terminal of said voltage amplifier stage and said control terminals of said differential to single-ended converting input stage, said biasing circuit being connected to the second current terminals of each transistor and said voltage amplifier stage being connected to one of said second current terminals so that said first terminals may be driven in a common mode potential range which includes a supply rail.
Claim 3
Dependent Claim 41 words
The high gain transistor amplifier of claim 1 in which said input means includes a buffer amplifier connected with said first current terminals for raising the input impedance and lowering the input current to said differential to single-ended converting input stage.
Claim 4
Dependent Claim 34 words
The high gain transistor amplifier of claim 1 in which differential to single ended converting input stage includes means for connecting said control terminals together and to the other of said second current terminals.
Claim 5
Dependent Claim 79 words
The high gain transistor amplifier of claim 3 in which said means for connecting includes a bootstrap transistor with its current terminals connected between said control terminals of said pair of transistors and said other of said second current terminals, the control terminal of said bootstrap transistor being responsive to said voltage amplifier stage for driving the voltage on said other of said second current terminals to follow the voltage on the said one of said second current terminals.
Claim 6
Dependent Claim 18 words
The high gain transistor amplifier of claim 1 in which said biasing circuit includes a ratioed current mirror.
Claim 7
Dependent Claim 23 words
The high gain transistor amplifier of claim 1 further including a starting circuit for establishing a minimum bias current from said biasing circuit.
Claim 8
Dependent Claim 34 words
The high gain transistor amplifier of claim 1 in which said biasing circuit includes a pair of cascode transistors interconnected with said second current terminals for increasing the output impedance of said biasing circuit.
Claim 9
Dependent Claim 92 words
The high gain transistor amplifier of claim 1 in which said biasing circuit includes at least one transistor having a control terminal which subtracts current from said control terminals of said differential to single ended converting input stage and from said control terminal of said voltage amplifier stage and a correction circuit, responsive to said voltage amplifier stage, for delivering a first correcting current to said control terminals of said input stage and a second correction current to said control terminal of said voltage amplifier stage to compensate for the subtracted current.
Claim 10
Dependent Claim 39 words
The high gain transistor amplifier of claim 1 in which said voltage amplifier stage includes a voltage offset device for increasing the voltage on said control terminal of said voltage amplifier stage to extend the common mode input range.

References Cited (Backward Citations)

US4857862A Cited
US5010303A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-04-10 1998-10-10 1999-04-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-04-10 2002-10-10 2003-04-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-04-10 2006-10-10 2007-04-11 $7700.00 Window Closed / Lapsed

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