Balanced integrated circuit differential amplifier

Claim 2

An integrated circuit differential amplifier comprising: differential input stage means including at least a pair of first and second semiconductor devices each having an input electrode, an output electrode and a common electrode, the common electrodes being connected to each other, said input stage means providing at one of said output electrodes a differential signal related to the difference between two input signals each separately coupled to a different one of said input electrodes; output stage means having an input terminal connected to said one output electrode of said input stage means for amplifying said differential signal and providing said amplified differential signal as an output signal at an output terminal of said output stage means, said output stage means inherently providing a predetermined impedance and current load at said one output electrode of said input stage means by virtue of its connection thereto, wherein the improvement comprises, current mirror circuitry for developing a current mirror signal substantially corresponding to output current drawn through said output stage means regardless of any current drawn by any additional circuitry connected to said output terminal; and load balancing circuit means having current there through determined by said current mirror signal and having an input terminal directly coupled to and loading another one of said input stage output electrodes, wherein said balancing circuit means provides at its input terminal an impedance and current load substantially identical to the impedance and current load provided by said output stage means regardless of any current drawn by any additional circuitry connected to said output terminal, whereby offset variation of said differential signal as a function of conduction of said output stage means is reduced.

Claim 3

An integrated circuit differential amplifier according to claim 1 wherein said first and second semiconductor devices are identical type semiconductor devices with identical type corresponding input, output and common electrodes.

Claim 4

An integrated circuit differential amplifier according to claim 2 wherein said first and second semiconductor devices are transistors, said common electrodes are base electrodes, said input electrodes are emitter electrodes and said output electrodes are collector electrodes.

Claim 5

An integrated circuit differential amplifier according to claim 3 wherein said output stage means includes an output transistor having its base connected to said one output electrode, said output transistor amplifying said differential signal and providing said amplified differential signal as said output signal at one of its collector and emitter electrodes.

Claim 6

An integrated circuit differential amplifier according to claim 4 wherein said load balancing circuit means includes a load balance transistor having its base connected to said another one of said output electrodes of said input stage means, current through said load balance transistor determined by said current mirror signal and being substantially equal to current through said output transistor.

Claim 7

An integrated circuit differential amplifier according to claim 5 wherein said output stage means includes a multiple collector transistor having one collector electrode providing current to said output transistor and another collector electrode providing a predetermined related current to a diode connected transistor which is part of said current mirror circuitry and which develops said current mirror signal in response thereto.

Claim 8

An integrated circuit differential amplifier according to claim 6 wherein said first and second transistors and said output and load balance transistors are all NPN transistors.

Claim 9

An integrated circuit differential amplifier according to claim 1 wherein said output stage means includes an output transistor having a control electrode directly connected to said one output electrode of said differential input stage means, said output stage means output transistor amplifying said differential signal and providing said amplified differential signal as said output signal at an output electrode thereof.

Claim 10

An integrated circuit differential amplifier according to claim 8 wherein said load balancing circuit means includes a load balance transistor of the same type as said output stage means output transistor, said load balance transistor having a control electrode, of the same type as the control electrode of said output stage means output transistor, connected to said another one of said output electrodes of said differential input stage means, current through said load balance transistor being determined by said current mirror signal and being substantially equal to current through said output stage means output transistor.

Claim 11

An integrated circuit differential amplifier according to claim 9 wherein said output stage means includes a current source transistor having multiple electrodes of the same type, one of said multiple electrodes providing current to said output stage output transistor and another of said multiple electrodes providing a predetermined related current to a diode connected transistor which is part of said current mirror circuitry and which develops said current mirror signal in response thereto across said diode connected transistor.

Claim 12

An integrated circuit amplifier comprising: differential input stage means including at least a pair of first and second semiconductor devices each having an input electrode, an output electrode and a common electrode, the common electrodes being connected to each other, said input stage means providing at one of said output electrodes a differential signal related to the difference between two input signals each separately coupled to a different one of said input electrodes; output stage means having an input terminal connected to said one output electrode of said input stage means for amplifying said differential signal and providing said amplified differential signal as an output signal at an output terminal of said output stage means, said output stage means inherently providing a predetermined impedance and current load at said one output electrode of said input stage means by virtue of its connection thereto, said amplifier including an input resistor, the voltage across which determines one of said input signals, and including an output resistor, the voltage across which determines another one of said input signals, said output resistor coupled to said output stage, said amplifier providing a voltage across said output resistor substantially equal to the voltage applied across said input resistor, the current gain of said amplifier being substantially equal to the ratio of said output and input resistors with said amplifier providing unity gain for the voltage across said output resistor with respect to the voltage across said input resistor; current mirror circuitry for developing a current mirror signal substantially corresponding to output current drawn through said output stage means; and load balancing circuit means having current there through determined by said current mirror signal and having an input terminal directly coupled to and loading another one of said input stage output electrodes, wherein said balancing circuit means provides at its input terminal an impedance and current load substantially identical to the impedance and current load provided by said output stage means, whereby offset variation of said differential signal as a function of conduction of said output stage means is reduced.

Claim 13

An integrated circuit amplifier comprising: differential input stage means including at least a pair of first and second semiconductor devices each having an input electrode, an output electrode and a common electrode, the common electrodes being connected to each other, said input stage means providing at one of said output electrodes a differential signal related to the difference between two input signals each separately coupled to a different one of said input electrodes; output stage means having an input terminal connected to said one output electrode of said input stage means for amplifying said differential signal and providing said amplified differential signal as an output signal at an output terminal of said output stage means, said output stage means inherently providing a predetermined impedance and current load at said one output electrode of said input stage means by virtue of its connection thereto, said amplifier including an input resistor, the voltage across which determines one of said input signals, and including an output resistor, the voltage across which determines another one of said input signals, said output resistor coupled to said output stage, said amplifier providing a voltage across said output resistor substantially equal to the voltage applied across said input resistor, the current gain of said amplifier being substantially equal to the ratio of said output and input resistors with said amplifier providing unity gain for the voltage across said output resistor with respect to the voltage across said input resistor; current mirror circuitry for developing a current mirror signal substantially corresponding to output current drawn through said output stage means; and load balancing circuit means having current there through determined by said current mirror signal and having an input terminal directly coupled to and loading another one of said input stage output electrodes, wherein said balancing circuit means provides at its input terminal an impedance and current load substantially identical to the impedance and current load provided by said output stage means, whereby offset variation of said differential signal as a function of conduction of said output stage means is reduced.

Claim 14

An integrated circuit amplifier according to claim 11 wherein one of said differential input stage means input electrodes is coupled to an externally supplied input signal which determines the voltage across said input resistor, and wherein said amplifier includes a high gain negative feedback circuit path from said one of said input stage means electrodes to another one of said input electrodes, the voltage at said another one of said input electrodes of said differential input stage means being provided by said feedback path and being substantially equal in magnitude to the voltages across said input and output resistors.

Claim 15

An integrated circuit amplifier according to claim 12 wherein said input and output resistors are formed on an integrated circuit which includes said differential input stage means, said output stage means, said current mirror circuitry, and said load balancing circuit means.

Claim 16

An integrated circuit amplifier according to claim 11 wherein said output stage means includes an output transistor having a control electrode directly connected to said one output electrode of said differential input stage means, said output stage means output transistor amplifying said differential signal and providing said amplified differential signal as an output signal at an output electrode thereof.

Claim 17

An integrated circuit amplifier according to claim 14 wherein said load balancing circuit means includes a load balance transistor of the same type as said output stage means output transistor, said load balance transistor having a control electrode, of the same type as the control electrode of said output stage means output transistor, connected to said another one of said electrodes of said differential input stage means, current through said load balance transistor being determined by said current mirror signal and being substantially equal to current through said output stage means output transistor.

Claim 18

An integrated circuit amplifier according to claim 15 wherein said output stage means includes a current source transistor having multiple electrodes of the same type, one of said multiple electrodes providing current to said output stage output transistor and another of said multiple electrodes providing a predetermined related current to a diode connected transistor which is part of said current mirror circuitry and which develops said current mirror signal in response thereto across said diode connected transistor.

Claim 19

An integrated circuit amplifier according to claim 11 which includes a pair of Darlington connected transistors connected to said output stage means for receiving said output signal and providing said voltage across said output resistor in response thereto.

Claim 20

An integrated circuit amplifier according to claim 17 which includes first and second overcurrent protection circuit means each monitoring the voltage across said output resistor and each separately coupled to a different one of the base electrodes of each of said Darlington transistors for reducing conduction of said Darlington transistors in response to sensing excessive current through said output resistor.

Claim 21

An integrated circuit differential amplifier comprising: differential input stage means including at least a pair of first and second semiconductor devices each having an input electrode, an output electrode and a common electrode, the common electrodes being connected to each other, said input stage means providing at one of said output electrodes a differential signal related to the difference between two input signals each separately coupled to a different one of said input electrodes; output stage means having an input terminal connected to said one output electrode of said input stage means for amplifying said differential signal and providing said amplified differential signal as an output signal at an output terminal of said output stage means, said output stage means inherently providing a predetermined impedance and current load at said one output electrode of said input stage means by virtue of its connection thereto, wherein the improvement comprises, current mirror circuitry for developing a current mirror signal substantially corresponding to output current drawn through said output stage means; and load balancing circuit means having current there through determined by said current mirror signal and having an input terminal directly coupled to and loading another one of said input stage output electrodes, wherein said balancing circuit means provides at its input terminal an impedance and current load substantially identical to the impedance and current load provided by said output stage means, whereby offset variation of said differential signal as a function of conduction of said output stage means is reduced, wherein said output stage means includes an output device having a control electrode directly connected to said one output electrode of said differential input stage means, said output stage means output device amplifying said differential signal and providing said amplified differential signal as said output signal at an output electrode thereof, wherein said load balancing circuit means includes a load balance device of the same type as said output stage means output device, said load balance device having a control electrode, of the same type as the control electrode of said output stage means output device, connected to said another one of said output electrodes of said differential input stage means, current through said load balance device being determined by said current mirror signal and being substantially equal to current through said output stage means output device, and wherein said output stage means includes a current source device having multiple electrodes of the same type, one of said multiple electrodes providing current to said output stage output device and another of said multiple electrodes providing a predetermined related current to a diode connected transistor which is part of said current mirror circuitry and which develops said current mirror signal in response thereto across said diode connected transistor.

Claim 22

An integrated circuit differential amplifier comprising: differential input stage means including at least a pair of first and second semiconductor devices each having an input electrode, an output electrode and a common electrode, the common electrodes being connected to each other, said input stage means providing at one of said output electrodes a differential signal related to the difference between two input signals each separately coupled to a different one of said input electrodes; output stage means having an input terminal connected to said one output electrode of said input stage means for amplifying said differential signal and providing said amplified differential signal as an output signal at an output terminal of said output stage means, said output stage means inherently providing a predetermined impedance and current load at said one output electrode of said input stage means by virtue of its connection thereto, wherein the improvement comprises, current mirror circuitry for developing a current mirror signal substantially corresponding to output current drawn through said output stage means; and load balancing circuit means having current there through determined by said current mirror signal and having an input terminal directly coupled to and loading another one of said input stage output electrodes, wherein said balancing circuit means provides at its input terminal an impedance and current load substantially identical to the impedance and current load provided by said output stage means, whereby offset variation of said differential signal as a function of conduction of said output stage means is reduced, wherein said output stage means includes an output device having a control electrode directly connected to said one output electrode of said differential input stage means, said output stage means output device amplifying said differential signal and providing said amplified differential signal as said output signal at an output electrode thereof, wherein said load balancing circuit means includes a load balance device of the same type as said output stage means output device, said load balance device having a control electrode, of the same type as the control electrode of said output stage means output device, connected to said another one of said output electrodes of said differential input stage means, current through said load balance device being determined by said current mirror signal and being substantially equal to current through said output stage means output device, and wherein said output stage means includes a current source device having multiple electrodes of the same type, one of said multiple electrodes providing current to said output stage output device and another of said multiple electrodes providing a predetermined related current to a diode connected transistor which is part of said current mirror circuitry and which develops said current mirror signal in response thereto across said diode connected transistor.

Claim 23

An integrated circuit differential amplifier according to claim 19 wherein said current source device comprises a current source transistor.