Integrated circuit sensor circuit

Claim 2

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein said second transistor provides an output signal at said output terminal which is determined by at least the input signal provided at said first input terminal, whereby input bias voltages substantially below the predetermined bias voltage applied to said IC substrate base can be tolerated while said integrated circuit provides said output signal at said output terminal; wherein said integrated circuit includes additional collector voltage protection circuitry means coupled to the collector electrodes of said first and second transistors for preventing the voltage at said collector electrodes from exceeding a predetermined voltage level with respect to said integrated circuit substrate bias potential despite the voltage applied to said input terminals, whereby forward biasing the integrated circuit substrate base isolation junction is prevented.

Claim 3

A sensor circuit according to claim 1 wherein said emitter electrode of said third transistor is DC connected to the collector electrode of said first transistor and wherein said collector electrode of said third transistor is DC connected to the bases of said first and second transistors.

Claim 4

A sensor circuit according to claim 2 wherein a constant current source means is connected to the collector electrode of said first transistor for supplying collector current thereto, the collector electrode of said third transistor providing suitable bias at the base of said first transistor to maintain said first transistor conductive to such an extent that substantially all of the current of said constant current source means is passed through said first transistor.

Claim 5

A sensor circuit according to claim 3 wherein said first and second transistors are NPN transistors and said third transistor is a PNP transistor.

Claim 6

A sensor circuit according to claim 4 wherein said PNP transistor is a lateral PNP transistor.

Claim 7

A sensor circuit according to claim 2 wherein said integrated circuit includes hysteresis feedback circuitry coupled between said output terminal and said emitter electrodes of said first and second transistors.

Claim 8

A sensor circuit according to claim 3 wherein said integrated circuit includes hysteresis feedback circuitry coupled between said output terminal and said emitter electrodes of said first and second transistors.

Claim 9

A sensor circuit according to claim 2 which includes a reluctance sensor, external to said integrated circuit, connected between said integrated circuit input terminals and providing a differential input signal therebetween.

Claim 10

A sensor circuit according to claim 8 wherein one of said input terminals is externally connected to an integrated circuit terminal corresponding to said integrated circuit substrate base at which said predetermined bias voltage is applied thereto.

Claim 11

A sensor circuit according to claim 1 wherein one of said input terminals is externally connected to an integrated circuit terminal corresponding to said integrated circuit substrate base at which said predetermined bias voltage is applied thereto.

Claim 12

A sensor circuit according to claim 1 wherein said integrated circuit includes input signal protection circuitry means connected to said integrated circuit input terminals for preventing voltage at said input terminals provided by circuitry external to said IC from exceeding maximum and minimum reference levels with respect to said integrated circuit predetermined substrate bias voltage.

Claim 13

A sensor circuit according to claim 11 wherein said integrated circuit substrate bias potential is ground voltage and wherein only single polarity power supply reference voltages with respect to said substrate bias potential are applied to said integrated circuit to supply operative power thereto.

Claim 14

A sensor circuit according to claim 1 wherein said additonal collector voltage protection means comprises a multiple emitter transistor having separate emitter electrodes connected to each of the collector electrodes of said first and second transistors, said multiple emitter transistor having a base electrode maintained at a reference potential.

Claim 15

A sensor circuit according to claim 3 wherein said IC includes a constant current source connected to the collector electrode of said second transistor for supplying collector current thereto.

Claim 16

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein said second transistor provides an output signal at said output terminal which is determined by at least the input signal provided at said first input terminal, whereby input bias voltages substantially below the predetermined bias voltage applied to said IC substrate base can be tolerated while said integrated circuit provides said output signal at said output terminal; wherein said integrated circuit includes hysteresis feedback circuitry means coupled between said output terminal and said emitter electrodes of said first and second transistors.

Claim 17

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein said second transistor provides an output signal at said output terminal which is determined by at least the input signal provided at said first input terminal, whereby input bias voltages substantially below the predetermined bias voltage applied to said IC substrate base can be tolerated while said integrated circuit provides said output signal at said output terminal; wherein said integrated circuit includes hysteresis feedback circuitry means coupled between said output terminal and said emitter electrodes of said first and second transistors.

Claim 18

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein said second transistor provides an output signal at said output terminal which is determined by at least the input signal provided at said first input terminal, whereby input bias voltages substantially below the predetermined bias voltage applied to said IC substrate base can be tolerated while said integrated circuit provides said output signal at said output terminal; wherein said integrated circuit includes input signal protection circuitry means connected to said integrated circuit input terminals for preventing voltage at said input terminals provided by circuitry external to said IC from exceeding maximum and minimum reference levels with respect to said integrated circuit predetermined substrate bias voltage.

Claim 19

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein said second transistor provides an output signal at said output terminal which is determined by at least the input signal provided at said first input terminal, whereby input bias voltages substantially below the predetermined bias voltage applied to said IC substrate base can be tolerated while said integrated circuit provides said output signal at said output terminal; wherein said integrated circuit includes input signal protection circuitry means connected to said integrated circuit input terminals for preventing voltage at said input terminals provided by circuitry external to said IC from exceeding maximum and minimum reference levels with respect to said integrated circuit predetermined substrate bias voltage.

Claim 20

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein an output signal is provided at said output terminal which is determined by at least the input signal provided at said first input terminal, wherein said emitter electrode of said third transistor is DC connected to the collector electrode of said first transistor and wherein said collector electrode of said third transistor is DC connected to the bases of said first and second transistors, wherein a constant current source means is connected to the collector electrode of said first transistor for supplying collector current thereto, the collector electrode of said third transistor providing suitable bias at the base of said first transistor to maintain said first transistor conductive to such an extent that substantially all of the current of said constant current source means is passed through said first transistor, wherein said integrated circuit includes additional collector voltage protection circuitry means coupled to the collector electrodes of said first and second transistors for preventing the voltage at said collector electrodes from exceeding a predetermined voltage level with respect to said integrated circuit substrate bias potential despite the voltage applied to said input terminals, and wherein said sensor circuit includes a reluctance sensor, external to said integrated circuit, connected between said integrated circuit input terminals and providing a differential input signal therebetween.

Claim 21

A sensor circuit comprising: an integrated circuit (IC) having a substrate base with a predetermined bias voltage applied thereto; said integrated circuit including first and second identical polarity transistors each having base, emitter and collector electrodes, said base electrodes being DC connected together and first and second input signal terminals of said integrated circuit coupled, respectively, to the emitter electrodes of said first and second transistors; said IC including an opposite polarity third transistor with base, emitter and collector electrodes and having its base and collector electrodes connected between an integrated circuit terminal having a reference voltage provided thereat and said commonly connected base electrodes of said first and second transistors, and an output terminal provided at the collector electrode of said second transistor, wherein an output signal is provided at said output terminal which is determined by at least the input signal provided at said first input terminal, wherein said emitter electrode of said third transistor is DC connected to the collector electrode of said first transistor and wherein said collector electrode of said third transistor is DC connected to the bases of said first and second transistors, wherein a constant current source means is connected to the collector electrode of said first transistor for supplying collector current thereto, the collector electrode of said third transistor providing suitable bias at the base of said first transistor to maintain said first transistor conductive to such an extent that substantially all of the current of said constant current source means is passed through said first transistor, wherein said integrated circuit includes additional collector voltage protection circuitry means coupled to the collector electrodes of said first and second transistors for preventing the voltage at said collector electrodes from exceeding a predetermined voltage level with respect to said integrated circuit substrate bias potential despite the voltage applied to said input terminals, and wherein said sensor circuit includes a reluctance sensor, external to said integrated circuit, connected between said integrated circuit input terminals and providing a differential input signal therebetween.

Claim 22

A sensor circuit according to claim 17 wherein said integrated circuit includes input signal protection circuitry means connected to said integrated circuit input terminals for preventing voltage at said input terminals provided by circuitry external to said IC from exceeding maximum and minimum reference levels with respect to said integrated circuit predetermined substrate bias voltage, and wherein said IC includes a constant current source connected to the collector electrode of said second transistor for supplying collector current thereto.