Ignition control integrated circuit having substrate injection preventing means

Claim 2

An integrated circuit of the type having a semiconductor substrate and adapted to facilitate the storage of energy in and the release of energy from external capacitive or inductive loads resulting in transient voltages within said integrated circuit during the release of said stored energy and wherein said integrated circuit includes an output transistor having a base, an emitter, and a collector, signals at one of said emitter and collector used for controlling the storage and release of said energy, conduction of said output transistor being controller by a driver stage coupled to the base of said output transistor and providing drive signals thereto, the improvement comprising substrate injection preventing means for precluding the injection of current from said substrate into at least said output transistor notwithstanding said transient voltages, said substrtate injection preventing means comprising control means in said integrated circuit and separate from said driver stage for preventing current flow through said base of said output transistor during the release of said stored energy and despite said transient voltages, thereby preventing substrate injection.

Claim 3

An integrated circuit as defined in claim 1 wherein said driver stage includes a current source coupled to said base of said output transistor for sourcing current into said base of said output transistor during the storage of said energy, said driver stage also including a driver transistor having an output electrode coupled separately from said current source to said output transistor base, signals at said driver transistor output electrode controlling conduction of said output transistor, and wherein said control means is arranged for disabling said current source during the release of said stored energy.

Claim 4

The integrated circuit as defined in claim 2 wherein said current source comprises a pair of transistors forming a current mirror, one of said current mirror transistors being coupled to said output transistor base, and the other said current mirror transistor being coupled to said control means.

Claim 5

An integrated circuit as defined in claim 3 wherein each said current mirror transistor includes a base, an emitter, and a collector, wherein said emitters are coupled to a common voltage source, wherein said bases are coupled together, wherein one of said collectors is coupled to said output transistor base, and wherein the other said collector is coupled to said control means.

Claim 6

An integrated circuit as defined in claim 4 wherein said control means includes a transistor having an emitter coupled to ground potential, a collector coupled to said other said collector and a base coupled to said driver stage for receiving switching signals therefrom.

Claim 7

An integrated circuit as defined in claim 4 wherein said current mirror transistors are PNP transistors.

Claim 8

An integrated circuit as defined in claim 5 wherein said control means transistor is an NPN transistor.

Claim 9

An integrated circuit as defined in claim 2 further including an input for receiving a control signal for initiating the release of said stored energy, and wherein said control means is coupled to said input for disabling said current source responsive to said control signal.

Claim 10

An integrated circuit as defined in claim 2 wherein said control means is also arranged for enabling said current source during the storing of said stored energy.

Claim 11

An ignition control circuit of the type which facilitates the storage of energy in an external inductive load during a dwell period and the release of said stored energy from said inductive load through a spark gap at the end of said dwell period, said circuit comprising: switch means for conducting current through said inductive load during said dwell period; and an integrated circuit for turning said switch means on during said dwell period and off at the end of said dwell period, said integrated circuit including an output transistor having a base, an emitter and a collector, signals at one of said emitter and collector used for controlling said switch means such that when said output transistor conducts said switch is closed and energy is stored in said load, a current source and a driver stage each coupled to said output transistor base for driving said output transistor, and control means for preventing injection of substrate current into said output transistor notwithstanding transient voltages caused during said release of stored energy, said control means, being separate from said driver stage and enabling said current source during said dwell period and disabling said current source and preventing current flow through said base of said output transistor at the end of said dwell period and thereby preventing turning on of said output transistor despite said transient voltages.

Claim 12

An ignition control circuit of the type which facilitates the storage of energy in an external inductive load during a dwell period and the release of said stored energy from said inductive load through a spark gap at the end of said dwell period, said circuit comprising: switch means for conducting current through said inductive load during said dwell period; and an integrated circuit for turning said switch means on during said dwell period and off at the end of said dwell period, said integrated circuit including an output transistor having a base, an emitter and a collector, signals at one of said emitter and collector used for controlling said switch means such that when said output transistor conducts said switch is closed and energy is stored in said load, a current source and a driver stage each coupled to said output transistor base for driving said output transistor, and control means for preventing injection of substrate current into said output transistor notwithstanding transient voltages caused during said release of stored energy, said control means, being separate from said driver stage and enabling said current source during said dwell period and disabling said current source and preventing current flow through said base of said output transistor at the end of said dwell period and thereby preventing turning on of said output transistor despite said transient voltages.

Claim 13

A circuit as defined in claim 10 wherein said output transistor emitter is coupled to said switch means, said collector is coupled to a voltage source, and said base is coupled to said current source, said driver stage including a driver transistor having an output electrode coupled separately from current source to said output transistor base.

Claim 14

A circuit as defined in claim 10 wherein said current source includes a pair of transistors forming a current mirror, one of said current mirror transistor having an output electrode coupled to said output transistor base and the other said current mirror transistor having a base electrode coupled to said control means.

Claim 15

A circuit as defined in claim 10 further including an input for receiving a dwell period control signal, and wherein said output transistor is responsive to said dwell period control signal for turning said switch means on during said dwell period and off at the end of said dwell period, and wherein said control means is also responsive to said dwell period control signal for enabling said current source only during said dwell period.

Claim 16

A circuit as defined in claim 12 wherein said control means includes a transistor having an emitter coupled to ground potential, a collector coupled to said base electrode of said other current mirror transistor and a base coupled to said driver stage for receiving switching signals therefrom.

Claim 17

A circuit as defined in claim 14 wherein said current mirror transistors are PNP transistors.

Claim 18

A circuit as defined in claim 14 wherein said control means transistor is an NPN transistor.

Claim 19

An integrated circuit as defined in claim 1 wherein said output transistor emitter is coupled to said load for controlling the storage and release of energy therein, and wherein said control means prevents turning on of said output transistor due to transient voltages at said emitter, thereby preventing said output transistor collector from following the transient voltages and causing substrate injection.

Claim 20

An integrated circuit as defined in claim 2 wherein said output transistor emitter is coupled to said load for controlling the storage and release of energy therein, and wherein said control means prevents turning on of said output transistor due to transient voltages at said emitter, thereby preventing said output transistor collector from following the transient voltages and causing substrate injection.

Claim 21

An integrated circuit as defined in claim 6 wherein said output transistor emitter is coupled to said load for controlling the storage and release of energy therein, and wherein said control means prevents turning on of said output transistor due to transient voltages at said emitter, thereby preventing said output transistor collector from following the transient voltages and causing substrate injection.