← Back to Patent Explorer
US4291319A Expired / Lapsed US ⏱️ 0.0 years remaining

Open base bipolar transistor protective device

Assignee: National Semiconductor Corp
•
Filing: 1979-06-27
•
Granted: 1981-09-22
•
Expires: 1999-06-27
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A transistor, used in the switching of current in an inductive load, is protected by a similar transistor connected between collector and base. The protective transistor has a lower breakdown voltage than the transistor being protected. When the inductive load produces a voltage surge, the protective transistor breaks down first and turns the protected transistor on so that the surge is absorbed in an active transistor not in breakdown and therefore capable of dissipating the surge without damage. Since the surge is arrested at high voltage the time required to complete the arrest is shortened.

Inventors

  • 👤 Charles P. Carinalli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 09:21
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/641; H10D84/642; H03; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0826; H03K17/51; H03K17/56; H03K17/60; H03K17/64; H10D89/00; H10D89/60

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 239 words
An integrated circuit for switching inductive load devices which generate transient voltages that may rise to levels in excess of transistor collector breakdown, said integrated including means for arresting said transient voltages to limit them to levels below said transistor collector breakdown and comprising: a semiconductor substrate; at least one isolated region in said substrate; an output transistor located in said isolated region, said output transistor having a base, a collector and an emitter made up of a plurality of individual small area emitter sections, the combination of which provides the total collector current capability, and a protective active transistor located in said substrate, said protective transistor having a floating, unconnected base, a collector coupled in common with said collector of said output transistor, and an emitter coupled to said base of said output transistor whereby said collector of said protective transistor in reverse biased when acting as a protective device, said emitter of said protective transistor being composed solely of a single emitter section having an area that is large in relation to the area of an individual one of said small area emitter sections to create a base region in said protective transistor that is thinner than the base region in said output transistor, said protective transistor having an active and higher base to collector current gain and a collector breakdown voltage that is close to but lower than the collector breakdown voltage of said output transistor.
Claim 2
Dependent Claim 239 words
An integrated circuit for switching inductive load devices which generate transient voltages that may rise to levels in excess of transistor collector breakdown, said integrated including means for arresting said transient voltages to limit them to levels below said transistor collector breakdown and comprising: a semiconductor substrate; at least one isolated region in said substrate; an output transistor located in said isolated region, said output transistor having a base, a collector and an emitter made up of a plurality of individual small area emitter sections, the combination of which provides the total collector current capability, and a protective active transistor located in said substrate, said protective transistor having a floating, unconnected base, a collector coupled in common with said collector of said output transistor, and an emitter coupled to said base of said output transistor whereby said collector of said protective transistor in reverse biased when acting as a protective device, said emitter of said protective transistor being composed solely of a single emitter section having an area that is large in relation to the area of an individual one of said small area emitter sections to create a base region in said protective transistor that is thinner than the base region in said output transistor, said protective transistor having an active and higher base to collector current gain and a collector breakdown voltage that is close to but lower than the collector breakdown voltage of said output transistor.
Claim 3
Dependent Claim 31 words
The integrated circuit of claim 1 wherein said output transistor and said protective transistor are located in common in said isolated region whereby said output and protective transistors have common collectors.
Claim 4
Dependent Claim 122 words
The integrated circuit of claim 2 wherein said isolated region further includes a driver transistor having a collector in common with the collectors of said output and said protective transistors, a base coupled to an input terminal, and an emitter coupled to the base of said output transistor, said emitter of said driver transistor being comprised of a plurality of individual small area sections of the same character as those of said output transistor emitter, the number of sections in said drive transistor being fewer than the number in said output transistor whereby said driver transistor has a breakdown voltage equal to that of said output transistor and said protective transistor acts to protect both said output transistor and said driver transistor.
Claim 5
Dependent Claim 48 words
The integrated circuit of claim 3 wherein said isolated region comprises an epitaxial layer of one conductivity type on a substrate having the opposite conductivity type and said isolated region is achieved by a diffused region having a conductivity of the same type as that of said substrate.
Claim 6
Dependent Claim 29 words
The integrated circuit of claim 4 wherein a buried layer of high conductivity is located at the juncture of said epitaxial layer and said substrate inside said isolated region.

References Cited (Backward Citations)

US3435295A Cited
US3742319A Cited
US3821780A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-09-21 1985-03-23 1985-09-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-09-21 1989-03-23 1989-09-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-09-21 1993-03-23 1993-09-22 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag