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US4378529A Expired / Lapsed US ⏱️ 0.0 years remaining

Differential amplifier input stage capable of operating in excess of power supply voltage

Assignee: National Semiconductor Corp
•
Filing: 1981-09-08
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Granted: 1983-03-29
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Expires: 2001-09-08
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Abstract

Abstract A pair of common base connected transistors have their emitters coupled to provide the input terminals of a differential amplifier. The collectors are coupled to a current mirror that provides a small current bias that operates the transistors at equal current densities. The common bases are coupled to a node that is driven to a level that causes the bases to track the emitters with a one V BE offset that will therefore automatically adjust to conform to the applied current. When a remotely grounded transducer is coupled to the amplifier input it can operate at a common mode potential outside of the span of the power supply that operates the amplifier.

Inventors

  • 👤 Robert C. Dobkin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 14:07
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F3/45484; H03F3/45488; H03F3/45493; H03F3/45506; H03F3/45076; H03F3/4508; H03F2200/00; H03F2200/261; H03F2203/00; H03F2203/45; H03F2203/45094; H03F2203/45096

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 234 words
A monolithic semiconductor integrated circuit differential amplifier input stage having first and second differential input terminals capable of supporting a common mode input voltage range that substantially exceeds the voltage span of a single two terminal power supply used to operate said circuit in which p n junction isolated transistors must have their collectors located in semiconductor regions that are reverse biased with respect to the semiconductor substrate that contains said circuit, said input stage comprising: first and second terminals of a single power supply connectable to a unitary source of operating voltage; first and second input transistors connected in a common base configuration, said first and second input transistors each having emitter, base and collector electrodes; means for connecting said emitter electrodes of said first and second transistors respectively directly to said first and second input terminals; means for reducing the base to collector current gain of said first and second transistors to a value close to unity; means for coupling said bases of said first and second transistors together and to means coupled to said second power supply terminal for providing a high resistance path for base current bias; and current mirror means coupled between said collectors of said first and second transistors and said second power supply terminal to provide a collector biasing current and to obtain a signal related to the differential voltage between said first and second input terminals.
Claim 2
Dependent Claim 234 words
A monolithic semiconductor integrated circuit differential amplifier input stage having first and second differential input terminals capable of supporting a common mode input voltage range that substantially exceeds the voltage span of a single two terminal power supply used to operate said circuit in which p n junction isolated transistors must have their collectors located in semiconductor regions that are reverse biased with respect to the semiconductor substrate that contains said circuit, said input stage comprising: first and second terminals of a single power supply connectable to a unitary source of operating voltage; first and second input transistors connected in a common base configuration, said first and second input transistors each having emitter, base and collector electrodes; means for connecting said emitter electrodes of said first and second transistors respectively directly to said first and second input terminals; means for reducing the base to collector current gain of said first and second transistors to a value close to unity; means for coupling said bases of said first and second transistors together and to means coupled to said second power supply terminal for providing a high resistance path for base current bias; and current mirror means coupled between said collectors of said first and second transistors and said second power supply terminal to provide a collector biasing current and to obtain a signal related to the differential voltage between said first and second input terminals.
Claim 3
Dependent Claim 44 words
The input stage of claim 1 wherein said first and second transistors are inherently of high base to collector current gain and include plural collector construction and at least one collector of each of said first and second transistors is coupled to its base.
Claim 4
Dependent Claim 51 words
The input stage of claim 1 further comprising feedback means coupled between the collector and base electrodes of at least one of said first and second transistors to bias the bases of said first and second transistors to cause the voltage at said bases to track said common mode input voltage.
Claim 5
Dependent Claim 36 words
The input stage of claim 3 wherein said feedback means comprise amplifier means coupled between said bases of said first and second transistors and at least one of said collectors of said first and second transistors.

References Cited (Backward Citations)

US3786362A Cited
US3895307A Cited
US3938055A Cited
US4059808A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-03-28 1986-09-27 1987-03-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-03-28 1990-09-27 1991-03-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-03-28 1994-09-27 1995-03-29 $7700.00 Window Closed / Lapsed

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