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US5399533A
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Method improving integrated circuit planarization during etchback
Assignee: Philips Semiconductors Inc
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Filing: 1993-12-01
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Granted: 1995-03-21
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Expires: 2013-12-01
Abstract
Abstract An integrated circuit fabrication method begins with semiconductor devices formed on a substrate. A patterned metal layer is deposited on the substrate to connect the semiconductor devices. A nitride layer is deposited over the metal layer and substrate. The nitride layer topography comprises hills located over metal regions and valleys located over non-metal regions. Spin-on-glass (SOG) is deposited over the nitride layer, thereby filling the valleys and covering the hills. The SOG layer and the nitride layer hills are etched back at substantially the same etch rate, using plasma etching, to form a planar surface. An oxide layer is then deposited over the planar surface to encapsulate the semiconductor devices, metal layer, nitride layer and SOG layer. Vias may then be etched through the oxide layer and the nitride layer to expose portions of the underlying metal layer and facilitate upper layer metal connections thereto. A second metal layer is deposited on the oxide layer and the fabrication process continues until the integrated circuit is complete.
Inventors
- 👤 Dipankar Pramanik
- 👤 Vivek Jain
- 👤 Milind Weling
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:54
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/092
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
142 words
A method of manufacturing an integrated circuit, on a substrate, comprising the steps of: depositing a patterned metal layer on said substrate; and fabricating a dielectric cover over the patterned metal layer, comprising the steps of: depositing a nitride layer, absent sufficient oxygen to cause liberation of oxygen during etchback, over said substrate and the patterned metal layer, wherein the nitride layer is deposited in such manner to create hills in the nitride layer having metal thereunder and valleys in the nitride layer having no metal thereunder; depositing a spin on glass (SOG) layer on the nitride layer thereby predominantly filling the valleys in the nitride layer; etching back the SOG layer and the hills of the nitride layer to create a substantially planar surface; and depositing an oxide layer on the substantially planar surface resulting in a substantially planar oxide layer.
Claim 2
Independent Claim
142 words
A method of manufacturing an integrated circuit, on a substrate, comprising the steps of: depositing a patterned metal layer on said substrate; and fabricating a dielectric cover over the patterned metal layer, comprising the steps of: depositing a nitride layer, absent sufficient oxygen to cause liberation of oxygen during etchback, over said substrate and the patterned metal layer, wherein the nitride layer is deposited in such manner to create hills in the nitride layer having metal thereunder and valleys in the nitride layer having no metal thereunder; depositing a spin on glass (SOG) layer on the nitride layer thereby predominantly filling the valleys in the nitride layer; etching back the SOG layer and the hills of the nitride layer to create a substantially planar surface; and depositing an oxide layer on the substantially planar surface resulting in a substantially planar oxide layer.
Claim 3
Dependent Claim
23 words
The method of claim 1, wherein the nitride layer consists essentially of silicon nitride and the oxide layer consists essentially of TEOS-based oxide.
Claim 4
Dependent Claim
45 words
The method of claim 1, wherein said step of etching back the nitride layer and the SOG layer is performed using a gas selected from the group consisting of CHF 3 , CF 4 , C 2 F 6 , SF 6 and combinations thereof,
Claim 5
Dependent Claim
34 words
The method of claim 1, wherein said step of depositing a nitride layer is carried out by forming the nitride layer to a thickness in the approximate range of 5,000 Å to 6,000 Å.
Claim 6
Dependent Claim
40 words
The method of claim 1, wherein said step of depositing a SOG layer is carried out by forming the SOG layer to a thickness in the approximate range of at least 2,000 Å, over flat regions of the nitride layer.
Claim 7
Dependent Claim
41 words
The method of claim 1, wherein said step of depositing a SOG layer is carried out by forming the SOG layer to a thickness in the approximate range of 2,500 Å to 3,500 Å, over flat regions of the nitride layer.
Claim 8
Dependent Claim
88 words
The method of claim 1, further comprising the steps of: etching vias through the oxide layer and the nitride layer to expose portions of the patterned metal layer deposited on the substrate; depositing a patterned metal layer on the oxide layer, wherein portions of the patterned metal layer deposited on the oxide fill the vias and contact the exposed portions of the patterned metal layer deposited on the substrate; again performing said fabricating steps to fabricate a dielectric cover over the patterned metal layer deposited on the oxide.
Claim 9
Dependent Claim
68 words
The method of claim 1, wherein: said step of depositing a nitride layer is preceded by a step of depositing a silicon rich oxide layer over said substrate and the patterned metal layer, wherein the silicon rich oxide layer is deposited in such manner to create hills in the silicon rich oxide layer having metal thereunder and valleys in the silicon rich oxide layer having no metal thereunder.
Claim 10
Dependent Claim
23 words
The method of claim 8, wherein the nitride layer consists essentially of silicon nitride and the oxide layer consists essentially of TEOS-based oxide.
Claim 11
Dependent Claim
45 words
The method of claim 8, wherein said step of etching back the nitride layer and the SOG layer is performed using a gas selected from the group consisting of CHF 3 , CF 4 , C 2 F 6 , SF 6 and combinations thereof.
Claim 12
Dependent Claim
38 words
The method of claim 8, wherein said step of depositing a silicon rich oxide layer is carried out by forming the silicon rich oxide layer to a thickness in the approximate range of 1,000 Å to 2,000 Å.
Claim 13
Dependent Claim
34 words
The method of claim 8, wherein said step of depositing a nitride layer is carried out by forming the nitride layer to a thickness in the approximate range of 5,000 Å to 6,000 Å.
Claim 14
Dependent Claim
40 words
The method of claim 8, wherein said step of depositing a SOG layer is carried out by forming the SOG layer to a thickness in the approximate range of at least 2,000 Å over flat regions of the nitride layer.
Claim 15
Dependent Claim
41 words
The method of claim 8, wherein said step of depositing a SOG layer is carried out by forming the SOG layer to a thickness in the approximate range of 2,500 Å to 3,500 Å over flat regions of the nitride layer.
Claim 16
Dependent Claim
93 words
The method of claim 8, further comprising the steps of: etching vias through the oxide layer, the nitride layer and the silicon rich oxide layer to expose portions of the patterned metal layer deposited on the substrate; depositing a patterned metal layer on the oxide layer, wherein portions of the patterned metal layer deposited on the oxide fill the vias and contact the exposed portions of the patterned metal layer deposited on the substrate; again performing said fabricating steps to fabricate a dielectric cover over the patterned metal layer deposited on the oxide.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-03-20 | 1998-09-19 | 1999-03-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-20 | 2002-09-19 | 2003-03-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-20 | 2006-09-19 | 2007-03-21 | $7700.00 | Window Closed / Lapsed |