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US5397903A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor substrate for gettering

Assignee: NEC Electronics Corp
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Filing: 1993-01-28
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Granted: 1995-03-14
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Expires: 2013-01-28
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Abstract

Abstract Disclosed is a semiconductor device fabrication substrate having a getter site formed directly below the device fabrication region to allow gettering near the device fabrication region. A polycrystalline Si layer is deposited on the mirror-finished surface of a first monocrystalline Si wafer by vapor phase epitaxy. Then, the mirror-finished surface of a second monocrystalline Si wafer is brought into contact with the surface of the polycrystalline Si layer and are laminated with each other by heat treatment. Then, the top surface of the second monocrystalline Si wafer is subjected to grinding and mirror-finishing, so that the range from the mirror-finished surface to the polycrystalline Si layer may be on the order of several μm to several tens of μm. The resultant substrate has a getter layer (polycrystalline Si layer) directly below the device fabrication region.

Inventors

  • 👤 Koji Hirose

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:50
CPC Classifications
H; H10; H10P; H10P36/00; H10P36/03; Y; Y10; Y10S; Y10S257/00; Y10S257/913

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 133 words
A substrate for fabricating a semiconductor device comprising: a polycrystalline silicon layer sandwiched between monocrystalline silicon wafers, a first main surface of one of said monocrystalline silicon wafers being a surface on which semiconductor device fabrication regions are formed, and wherein said polycrystalline silicon layer provides a getter site directly under at least one of said semiconductor device fabrication regions and has first and second main surfaces opposite to each other, said one of said monocrystalline silicon wafers having a second main surface which is opposite to said first main surface thereof and is in contact directly with said first main surface of said polycrystalline silicon layer, and the other of said monocrystalline silicon wafers having a main surface which is in contact directly with said second main surface of said polycrystalline layer.
Claim 2
Dependent Claim 133 words
A substrate for fabricating a semiconductor device comprising: a polycrystalline silicon layer sandwiched between monocrystalline silicon wafers, a first main surface of one of said monocrystalline silicon wafers being a surface on which semiconductor device fabrication regions are formed, and wherein said polycrystalline silicon layer provides a getter site directly under at least one of said semiconductor device fabrication regions and has first and second main surfaces opposite to each other, said one of said monocrystalline silicon wafers having a second main surface which is opposite to said first main surface thereof and is in contact directly with said first main surface of said polycrystalline silicon layer, and the other of said monocrystalline silicon wafers having a main surface which is in contact directly with said second main surface of said polycrystalline layer.

References Cited (Backward Citations)

US3192398A Cited
US3894893A Cited
DE1926884A1 Cited
US4053335A Cited
US4559086A Cited
JPS62216236A Cited
DE3743774A1 Cited
US5189508A Cited
JPH03132055A Cited
US5238875A Cited
JPH04273128A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-03-13 1998-09-12 1999-03-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-03-13 2002-09-12 2003-03-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-03-13 2006-09-12 2007-03-14 $7700.00 Window Closed / Lapsed

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