Patent JPS4816705B1 successfully refreshed from Google Patents.
Patent US20030101136A1 successfully refreshed from Google Patents.
US5391985A
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US
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Method and apparatus for measuring high speed logic states using voltage imaging with burst clocking
Assignee: Photon Dynamics Inc
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Filing: 1992-03-06
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Granted: 1995-02-21
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Expires: 2012-03-06
Abstract
Abstract An array of circuit elements which when excited produces voltages is analyzed by examining successive voltage images produced by the circuit elements. Specifically, the array of circuit elements is repeatedly excited at high speed while the voltage image produced by the array is electro-optically sampled at a succession of clock times using a relatively slow-speed electro-optic image sampling technique using a burst clock, thereby to capture a succession of voltage images. The successive voltage images can be viewed on a display device directly individually, or they can be processed by an image processor which compares the successive voltage images with stored representations of voltage images to yield information regarding the condition of the array. Maximum permissible device operating speed can also be determined without examination of individual cells.
Inventors
- 👤 Francois J. Henley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 15:16
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/006; G01; G01R; G01R31/00; G01R31/28; G01R31/302; G01R31/308; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/1306; G02F1/1309
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
198 words
An apparatus for testing an electronic device which operates at a normal clock rate and which produces a two-dimensional voltage image, said apparatus comprising: a voltage image sensing means for capturing said voltage image of the device by an electro-optic interaction, said voltage image sensing means comprising a voltage image modulator unit, said voltage image sensing means not being capable of responding at the normal clock rate of the device; means for setting the device to a first known state in order to initialize the device; means for operating the device at said normal clock rate for preselected counts of clock cycles and for suspending operation of the device at a first preselected clock cycle count, said operating means comprising a pattern generator coupled to a synchronizer, said synchronizer being coupled to a computer and the computer being coupled to an image processor; means for capturing a first voltage image from said voltage sensing means at said first preselected clock cycle count at a preselected interval after suspending operation of said device, said capturing means comprising a video camera unit coupled to an image processor; and output means for presenting at least said first voltage image for examination.
Claim 2
Independent Claim
198 words
An apparatus for testing an electronic device which operates at a normal clock rate and which produces a two-dimensional voltage image, said apparatus comprising: a voltage image sensing means for capturing said voltage image of the device by an electro-optic interaction, said voltage image sensing means comprising a voltage image modulator unit, said voltage image sensing means not being capable of responding at the normal clock rate of the device; means for setting the device to a first known state in order to initialize the device; means for operating the device at said normal clock rate for preselected counts of clock cycles and for suspending operation of the device at a first preselected clock cycle count, said operating means comprising a pattern generator coupled to a synchronizer, said synchronizer being coupled to a computer and the computer being coupled to an image processor; means for capturing a first voltage image from said voltage sensing means at said first preselected clock cycle count at a preselected interval after suspending operation of said device, said capturing means comprising a video camera unit coupled to an image processor; and output means for presenting at least said first voltage image for examination.
Claim 3
Dependent Claim
68 words
The apparatus according to claim 1 further including: means for comparing at least said first voltage image with a known good image which is produced at said first preselected clock cycle count to determine if the at least first voltage image differs from the known good image, thereby to indicate that faults are present in the device, said comparing means comprising the image processor coupled to the computer.
Claim 4
Independent Claim
162 words
A method for testing an electronic device which operates at a normal clock rate and which produces a two-dimensional voltage image, said testing method using a voltage image sensing means and means for exercising said device, said exercising means comprising pattern generator coupled to a synchronizer, said voltage image sensing means not being capable of responding at the normal clock rate of the electronic device, said method comprising the steps of: setting, by means of said exercising means, the electronic device to a first known state; operating, by means of said exercising means, the electronic device at its normal clock rate for a first preselected count of clock cycles; suspending operation of the electronic device, by means of said exercising means, at a first preselected clock cycle count; after a preselected interval, capturing, by means of said voltage imaging means, a first voltage image at said preselected clock cycle count; and presenting said first voltage image for examination through an output means.
Claim 5
Independent Claim
162 words
A method for testing an electronic device which operates at a normal clock rate and which produces a two-dimensional voltage image, said testing method using a voltage image sensing means and means for exercising said device, said exercising means comprising pattern generator coupled to a synchronizer, said voltage image sensing means not being capable of responding at the normal clock rate of the electronic device, said method comprising the steps of: setting, by means of said exercising means, the electronic device to a first known state; operating, by means of said exercising means, the electronic device at its normal clock rate for a first preselected count of clock cycles; suspending operation of the electronic device, by means of said exercising means, at a first preselected clock cycle count; after a preselected interval, capturing, by means of said voltage imaging means, a first voltage image at said preselected clock cycle count; and presenting said first voltage image for examination through an output means.
Claim 6
Dependent Claim
52 words
The method according to claim 3 further including the step of thereafter comparing said first voltage image with a first known good image at said first preselected clock cycle count to determine if the first voltage image differs from the first known good image indicative that faults are present in the device.
Claim 7
Independent Claim
174 words
A method for testing an electronic device which operates at a normal clock rate and which produces a two-dimensional voltage image, said testing method using a voltage image sensing means and means for exercising the electronic device, said voltage image sensing means not being capable of responding at the normal clock rate of the electronic device, said method comprising the steps of: setting, by means of said exercising means, the electronic device to a first known state; operating, by means of said exercising means, the electronic device at a first clock rate for a plurality of clock cycles; thereafter within a period of time less than an inherent decay time of said voltage image sensing means: repetitively resetting, by means of said exercising means, the electronic device to the first known state and operating, by means of said exercising means, the electronic device for at least said plurality of clock cycles; and capturing, by means of said voltage imaging means a voltage image of the electronic device to obtain a first RMS voltage reading.
Claim 8
Independent Claim
174 words
A method for testing an electronic device which operates at a normal clock rate and which produces a two-dimensional voltage image, said testing method using a voltage image sensing means and means for exercising the electronic device, said voltage image sensing means not being capable of responding at the normal clock rate of the electronic device, said method comprising the steps of: setting, by means of said exercising means, the electronic device to a first known state; operating, by means of said exercising means, the electronic device at a first clock rate for a plurality of clock cycles; thereafter within a period of time less than an inherent decay time of said voltage image sensing means: repetitively resetting, by means of said exercising means, the electronic device to the first known state and operating, by means of said exercising means, the electronic device for at least said plurality of clock cycles; and capturing, by means of said voltage imaging means a voltage image of the electronic device to obtain a first RMS voltage reading.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-02-20 | 1998-08-22 | 1999-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-02-20 | 2002-08-22 | 2003-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-02-20 | 2006-08-22 | 2007-02-21 | $7700.00 | Window Closed / Lapsed |