Process for production of stacked capacitor of semiconductor device

Claim 1

A process for production of a stacked capacitor of a semiconductor device comprising the steps of: a) forming a first insulating layer and a second insulating layer on a transistor structure one by one, said transistor structure resulting from forming of a device separating oxide layer, a gate oxide layer, a gate electrode, a spacer oxide layer, a source region and a drain region on a semiconductor substrate; b) forming a bit line, contacting with said drain region, by etching said second insulating layer and said first insulating layer on said drain region after patterning of a bit line contact and, thereafter, forming a third insulating layer and a fourth insulating layer on the result structure one by one; c) forming a first conductive layer, a first buffer oxide layer, a second conductive layer and a fifth insulating layer on the result structure of the b) step one by one and, thereafter, developing a first photoresist film used as a storage node contact mask; d) etching said fifth insulating layer, said second conductive layer, said first buffer oxide layer and said first conductive layer one by one and, thereafter, removing said first photoresist film; e) forming a conductive layer on the result structure of the d) step and, thereafter, etching the result structure entirely for forming a spacer on said structure; f) etching said fourth insulating layer, said third insulating layer, said second insulating layer and said first insulating layer one by one, thereby forming a contact hole exposing said source region to the outside; g) forming a third conductive layer and a second buffer oxide layer on the structure resulting from) step f) one by one and, thereafter, etching said structure to form said second buffer oxide layer with a width and length; h) forming a fourth conductive layer and a sixth insulating layer on the resulting structure of step g) one by one and, thereafter, forming a second photoresist film having a width and length larger than said second buffer oxide layer; i) etching said sixth insulating layer, said fourth conductive layer, said third conductive layer and said second conductive layer; j) removing said second photoresist film and removing all of said first and second buffer oxide layers and, thereafter, partially etching said first conductive layer using the remaining sixth insulating layer as an etch barrier; and k) etching said sixth insulating layer for removing this layer and, thereafter, applying a capacitor dielectric layer and forming a plate electrode.