US5386539A
Expired / Lapsed
US
⏱️ 0.0 years remaining
IC memory card comprising an EEPROM with data and address buffering for controlling the writing/reading of data to EEPROM
Assignee: Fujifilm Corp
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Filing: 1991-08-29
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Granted: 1995-01-31
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Expires: 2011-08-29
Abstract
Abstract An IC memory card connectable to a host has a storage implemented as an EEPROM, and a control circuit for controlling the storage to write data transferred from the host to the memory card in the storage. The control circuit has latches for temporarily holding input data and an address representative of a particular storage location of the storage for storing the data which are transferred from the host, a clock input terminal for receiving from the host a first clock for causing the latches to hold the data, and a clock generator for generating a second clock for writing the data in the storage.
Inventors
- 👤 Seiki Nishi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 07:51
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/16; G06F13/1668; G06F13/1689; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K19/073
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
119 words
An IC memory card removably connectable to a host, the IC memory card comprising: an EEPROM for storing data; and control means for controlling writing of the data transferred from the host into said EEPROM of the IC memory card, said control means including holding means for receiving and temporarily holding the data and an address representative of a particular storage location of said EEPROM designated for storage of the data transferred from the host, clock input means for receiving from the host a first clock which controls timing of said holding means holding the data, and clock generating means for generating a second clock which controls timing of writing the data from said holding means into said EEPROM.
Claim 2
Dependent Claim
119 words
An IC memory card removably connectable to a host, the IC memory card comprising: an EEPROM for storing data; and control means for controlling writing of the data transferred from the host into said EEPROM of the IC memory card, said control means including holding means for receiving and temporarily holding the data and an address representative of a particular storage location of said EEPROM designated for storage of the data transferred from the host, clock input means for receiving from the host a first clock which controls timing of said holding means holding the data, and clock generating means for generating a second clock which controls timing of writing the data from said holding means into said EEPROM.
Claim 3
Dependent Claim
44 words
The IC memory card in accordance with claim 1, wherein said control means further includes write control means responsive to the second clock for writing the data held by said holding means into the particular storage location of said EEPROM corresponding to the address.
Claim 4
Dependent Claim
28 words
The IC memory card in accordance with claim 1, wherein said holding means comprises a first and a second latch for holding the data and the address, respectively.
Claim 5
Dependent Claim
28 words
The IC memory card in accordance with claim wherein said clock generating means comprises an oscillator for generating a reference clock from which the second clock is produced.
Claim 6
Dependent Claim
35 words
The IC memory card in accordance with claim 4, wherein said clock generating means further comprises a clock pulse generating circuit for dividing a frequency of the reference clock to thereby generate the second clock.
Claim 7
Dependent Claim
105 words
An IC memory card including an EEPROM configured to operate as an SRAM memory card when removably connected to a host, the IC memory card comprising: holding means for receiving and temporarily holding input data and an address representative of a particular storage location of the EEPROM in which the input data transferred from the host are to be stored; clock input means for receiving from the host a first clock which causes said holding means to hold the input data; and clock generating means for generating a second clock for controlling timing of writing the input data from said holding means into the EEPROM.
Claim 8
Dependent Claim
105 words
An IC memory card including an EEPROM configured to operate as an SRAM memory card when removably connected to a host, the IC memory card comprising: holding means for receiving and temporarily holding input data and an address representative of a particular storage location of the EEPROM in which the input data transferred from the host are to be stored; clock input means for receiving from the host a first clock which causes said holding means to hold the input data; and clock generating means for generating a second clock for controlling timing of writing the input data from said holding means into the EEPROM.
Claim 9
Dependent Claim
41 words
The IC memory card in accordance with claim 6, further comprising write control means responsive to said second clock for writing the input data held by said holding means into the particular storage location of the EEPROM corresponding to the address.
Claim 10
Dependent Claim
27 words
The IC memory card in accordance with claim 6, wherein said holding means comprises first and second latches for holding the input data and the address, respectively.
Claim 11
Dependent Claim
49 words
The IC memory card in accordance with claim 6, wherein said clock generating means comprises an oscillator for generating a reference clock from which said second clock is produced and a clock pulse generating circuit for dividing a frequency of said reference clock to thereby generate said second clock.
Claim 12
Independent Claim
101 words
A method of operating an IC memory card including an EEPROM as an SRAM memory card when removably connected to a host, comprising the steps of: (a) receiving from the host and temporarily holding input data and an address representative of a particular storage location of the EEPROM in holding means; (b) receiving from the host a first clock which causes said holding means to hold the input data; and (c) generating a second clock for controlling timing of writing of the input data held by said holding means into the particular storage location of the EEPROM corresponding to the address.
Claim 13
Independent Claim
101 words
A method of operating an IC memory card including an EEPROM as an SRAM memory card when removably connected to a host, comprising the steps of: (a) receiving from the host and temporarily holding input data and an address representative of a particular storage location of the EEPROM in holding means; (b) receiving from the host a first clock which causes said holding means to hold the input data; and (c) generating a second clock for controlling timing of writing of the input data held by said holding means into the particular storage location of the EEPROM corresponding to the address.
Claim 14
Dependent Claim
29 words
The method in accordance with claim 10, wherein said step (a) comprises holding the input data and the address in respective first and second latches of said holding means.
Claim 15
Dependent Claim
40 words
The method in accordance with claim 10, wherein said step (c) comprises the steps of generating a reference clock from which said second clock is produced and dividing a frequency of said reference clock to thereby generate said second clock.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-01-30 | 1998-08-01 | 1999-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-30 | 2002-08-01 | 2003-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-30 | 2006-08-01 | 2007-01-31 | $7700.00 | Window Closed / Lapsed |