Double surface mount technology for electronic packaging

Claim 2

A printed circuit board comprising, in combination, a printed wiring board having a plurality of recesses; a plurality of circuit components comprising upper and lower circuit components electrically connected to the printed wiring board with at least one lower circuit component occupying a corresponding recess and at least one upper circuit component positioned above a plurality of lower circuit components; the upper and lower circuit components being independent of each other and each being fixedly electrically connected to an upper surface of the printed wiring board.

Claim 3

The printed circuit board of claim 1 wherein lower circuit components are nonidentical with the upper circuit components.

Claim 4

The printed circuit board of claim 2 wherein at least one of the upper and lower circuit components is surface mounted to the upper surface of the printed wiring board.

Claim 5

The printed circuit board of claim 3 wherein the upper and lower circuit components are surface mounted to the upper surface of the printed wiring board.

Claim 6

The printed circuit board of claim 4 wherein the at least one lower circuit component is suspended within the corresponding recess by leads.

Claim 7

The printed circuit board of claim 5 wherein the at least one lower circuit component resides in the corresponding recess without contacting an interior surface of the corresponding recess.

Claim 8

The printed circuit board of claim 6 wherein a plurality of upper circuit components are positioned above the plurality of lower circuit components.

Claim 9

The printed circuit board of claim 7 wherein the corresponding recess is an opening.

Claim 10

The printed circuit board of claim 7 wherein the corresponding recess is a well.

Claim 11

A printed circuit board comprising, in combination, a printed wiring board having a first upper surface and a second descending stepped upper surface with the second descending stepped upper surface having a plurality of recesses therein; a plurality of circuit components comprising upper and lower circuit components, at least one upper circuit component being fixedly electrically surface mounted to the first upper surface of the printed wiring board and at least one lower circuit component being fixedly electrically surface mounted to the second descending stepped upper surface, the at least one lower circuit component being suspended within a corresponding recess; and the at least one lower circuit component being nonidentical with and independent of the at least one upper circuit component with the at least one upper circuit component being positioned above the at least ode lower circuit component.

Claim 12

A printed circuit board comprising, in combination, a printed wiring board having a first upper surface and a second descending stepped upper surface with the second descending stepped upper surface having a plurality of recesses therein; a plurality of circuit components comprising upper and lower circuit components, at least one upper circuit component being fixedly electrically surface mounted to the first upper surface of the printed wiring board and at least one lower circuit component being fixedly electrically surface mounted to the second descending stepped upper surface, the at least one lower circuit component being suspended within a corresponding recess; and the at least one lower circuit component being nonidentical with and independent of the at least one upper circuit component with the at least one upper circuit component being positioned above the at least ode lower circuit component.

Claim 13

The printed circuit board of claim 10 wherein the at least one lower circuit component is suspended within the corresponding recess without contacting an interior surface of the corresponding recess.

Claim 14

The printed circuit board of claim 11 wherein the at least one upper circuit component is positioned above a plurality of lower circuit components.

Claim 15

The printed circuit board of claim 12 wherein a plurality of upper circuit components are positioned above the plurality of lower circuit components.

Claim 16

The printed circuit board of claim 13 wherein the corresponding recess is an opening.

Claim 17

The printed circuit board of claim 13 wherein the corresponding recess is a well.

Claim 18

A printed circuit board comprising, in combination, a printed wiring board having a first upper surface and a second descending stepped upper surface with the second descending stepped upper surface having a plurality of openings therein; a plurality of circuit components comprising upper and lower circuit components, a plurality of upper circuit components being fixedly electrically surface mounted to the first upper surface of the printed wiring board and a plurality of lower circuit components being fixedly electrically surface mounted to the second descending stepped upper surface, the plurality of lower circuit component being suspended within corresponding recesses without contacting an interior surface of the corresponding recess with the plurality of upper circuit components positioned above the plurality of lower circuit components; and the plurality of lower circuit components being nonidentical with and independent of the plurality of upper circuit components.

Claim 19

A printed circuit board comprising, in combination, a printed wiring board having a first upper surface and a second descending stepped upper surface with the second descending stepped upper surface having a plurality of openings therein; a plurality of circuit components comprising upper and lower circuit components, a plurality of upper circuit components being fixedly electrically surface mounted to the first upper surface of the printed wiring board and a plurality of lower circuit components being fixedly electrically surface mounted to the second descending stepped upper surface, the plurality of lower circuit component being suspended within corresponding recesses without contacting an interior surface of the corresponding recess with the plurality of upper circuit components positioned above the plurality of lower circuit components; and the plurality of lower circuit components being nonidentical with and independent of the plurality of upper circuit components.