Frequency synchronized bidirectional radio system

Claim 2

A bidirectional communication system comprising at least one communication cell having a base station and at least one remote station, in said cell said remote station receiving polling signals from said base station at a precise base clock rate on a precise base carrier frequency, in said cell said remote station transmitting response signals at a remote clock rate to said base station on a remote carrier frequency, said base clock rate being extracted at said remote station from said polling signals to generate said remote clock rate in synchronization with said base clock rate, said remote station calculating frequency error information relating to a difference in frequency between said precise base carrier frequency and said remote carrier frequency, and both said frequency error information and said remote clock rate being utilized in phase-lock loop circuitry in said remote station to stabilize said remote carrier frequency.

Claim 3

The communication system of claim 1 wherein an initial segment of a burst of data received by said base station from said remote station is used to scale a phase and an amplitude of a remainder of the burst.

Claim 4

The system of claim 1 or 2 wherein said polling signals are quadrature encoded and further comprising an apparatus for decoding in-phase and quadrature components of said polling signals at said remote station, said polling signals having a first component and a second component, said first component being an estimated in-phase component and said second component being an estimated quadrature component, said apparatus being comprised of: a) a rotator, said rotator generating a first rotated component and a second rotated component from said first component and said second component in response to a rotation signal; b) a phase detector, said phase detector detecting an amount of in-phase component and quadrature components in said first component and second component and generating a ramp control signal; and c) a ramp estimator, said ramp estimator reading said ramp control signal and generating said rotation signal such that said first and second rotated components are substantially equivalent to the in-phase and quadrature components of said polling signal, and said ramp estimator generating said frequency error information.

Claim 5

The system of claim 3, further comprising: a coarse clock estimator, said coarse clock estimator generating a sequence of coarse clock pulses from said first and second rotated components; and a fine clock timing error estimator, said fine clock timing error estimator sampling said coarse clock pulses to produce remote clock timing error information from values of said first and second rotated components, said remote clock timing error information being utilized in phase-lock loop circuitry in said remote station to stabilize said remote clock rate.

Claim 6

The system of claim 4, further comprising: an amplitude estimator, said amplitude estimator generating an amplitude estimate from a sum of squares of said first and second rotated components, and first and second multipliers, said first and second multipliers scaling said first and second components, respectively, by an amount inversely related to said amplitude estimate.

Claim 7

The system of claim 1 or 2, further comprising an apparatus for extracting a clock signal from a signal having a first and a second rotated component, said apparatus comprising: a coarse clock estimator, said coarse clock estimator generating a sequence of coarse clock pulses from said first and second rotated components; and a fine clock timing error estimator, said fine clock timing error estimator sampling said coarse clock pulses to produce remote clock timing error information from values of said first and second rotated components, said timing error information being utilized in phase-lock loop circuitry in said remote station to stabilize said remote clock rate.

Claim 8

The system of claim 6 wherein said polling signals are quadrature encoded, and further comprising an apparatus for decoding in-phase and quadrature components of said polling signal at said remote station, said polling signal having a first component and a second component, said first component being an estimated in-phase component and said second component being an estimated quadrature component, said apparatus being comprised of: a) a rotator, said rotator generating said first rotated component and said second rotated component from said first component and said second component in response to a rotation signal; b) a phase detector, said phase detector detecting an amount of in-phase component and quadrature components in said first component and second component and generating a ramp control signal; and c) a ramp estimator, said ramp estimator reading said ramp control signal and generating said rotation signal such that said first and second rotated components are substantially equivalent to the in-phase and quadrature components of said polling signal, and said ramp estimator generating base carrier frequency information.

Claim 9

The system of claim 7, further comprising: an amplitude estimator, said amplitude estimator generating an amplitude estimate from a sum of squares of said first and second rotated components, and first and second multipliers, said first and second multipliers scaling said first and second components, respectively, by an amount inversely related to said amplitude estimate.

Claim 10

A bidirectional radio communication system comprised of at least one communication cell, said cell having a base station and at least one remote station, said remote station receiving a polling signal at a precise base clock rate on a precise base carrier frequency from said base station, said remote station transmitting response signals at a remote clock rate to said base station on a remote carrier frequency, said remote station being comprised of: a first frequency synthesizer generating said remote carrier frequency, said remote carrier frequency being stabilized by a first stabilization signal directed to said first synthesizer; a first frequency heterodyne, said first heterodyne heterodyning said remote carrier frequency and polling signal received from said base station to generate an intermediate frequency signal; a second frequency synthesizer generating an intermediate frequency sinusoid, said intermediate frequency sinusoid being stabilized by a second frequency stabilization signal; a second frequency heterodyne, said second heterodyne heterodyning said intermediate frequency sinusoid and said intermediate frequency signal to generate a baseband signal; a first recovery circuit, said first recovery circuit recovering carrier frequency error information from said baseband signal and generating said first frequency stabilization signal; and a second recovery circuit, said second recovery circuit generating said second frequency stabilization signal from said baseband signal, and synchronizing said remote clock rate and said precise base clock rate.

Claim 11

A bidirectional radio communication system comprised of at least one communication cell, said cell having a base station and at least one remote station, said remote station receiving a polling signal at a precise base clock rate on a precise base carrier frequency from said base station, said remote station transmitting response signals at a remote clock rate to said base station on a remote carrier frequency, said remote station being comprised of: a first frequency synthesizer generating said remote carrier frequency, said remote carrier frequency being stabilized by a first stabilization signal directed to said first synthesizer; a first frequency heterodyne, said first heterodyne heterodyning said remote carrier frequency and polling signal received from said base station to generate an intermediate frequency signal; a second frequency synthesizer generating an intermediate frequency sinusoid, said intermediate frequency sinusoid being stabilized by a second frequency stabilization signal; a second frequency heterodyne, said second heterodyne heterodyning said intermediate frequency sinusoid and said intermediate frequency signal to generate a baseband signal; a first recovery circuit, said first recovery circuit recovering carrier frequency error information from said baseband signal and generating said first frequency stabilization signal; and a second recovery circuit, said second recovery circuit generating said second frequency stabilization signal from said baseband signal, and synchronizing said remote clock rate and said precise base clock rate.

Claim 14

The apparatus of claim 10, further comprising: an amplitude estimator generating an amplitude estimate from a sum of squares of said first and second rotated components, and first and second multipliers, said first and second multipliers scaling said first and second components, respectively, by an amount inversely proportional to said amplitude estimate.

Claim 15

The apparatus of claim 11 wherein said coarse clock estimator generates said coarse clock pulses from a square of a sum of squares of said first and second rotated components.

Claim 18

The apparatus of claim 13, further comprising a decoding apparatus for decoding in-phase and quadrature components of a quadrature encoded signal, said quadrature encoded signal having a first component and a second component, said first component being an estimated in-phase component and said second component being an estimated quadrature component, said decoding apparatus being comprised of: a) a rotator, said rotator generating said first rotated component and said second rotated component from said first component and said second component in response to a rotation signal; b) a phase detector, said phase detector detecting an amount of in-phase component and quadrature components in said first component and said second component and generating a ramp control signal; and c) a ramp estimator, said ramp estimator reading said ramp control signal and generating said rotation signal such that said first and second rotated components are substantially equivalent to the in-phase and quadrature components of said quadrature encoded signal.

Claim 19

The apparatus of claim 14, further comprising: an amplitude estimator generating an amplitude estimate from a sum of squares of said first and second rotated components, and first and second multipliers, said first and second multipliers scaling said first and second components, respectively, by an amount inversely proportional to said amplitude estimate.

Claim 20

The apparatus of claim 16 wherein said coarse clock estimator generates said coarse clock pulses from a square of a sum of squares of said first and second rotated components.