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US4993048A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-clocking system

Assignee: Unisys Corp
•
Filing: 1990-04-18
•
Granted: 1991-02-12
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Expires: 2010-04-18
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Abstract

Abstract Self-clocking system for demodulating phase encoded data automatically tracks incoming data rate changes by using information from a bit synchronizer to track the incoming base band data signal.

Inventors

  • 👤 Bruce H. Williams
  • 👤 Glenn A. Arbanas
  • 👤 Valjean P. Snyder

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 04:12
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/027; H04L25/00; H04L25/02; H04L25/0262; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2273; H04L27/0014; H04L2027/0024; H04L2027/0044; H04L2027/0063

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 222 words
A self-clocking system for demodulating phase encoded data signals which have a variable frequency, comprising in combination; means for generating a baseband data signal; means coupling said baseband signal to an input of a filter having a pass band matched to the frequency of said phase encoded data signal, said filter producing a filtered output data signal in response to said baseband signal input; means for comparing said filtered output data signal with a clock signal, said comparing means producing an output voltage which is a function of a phase difference between said filtered output data signal and said clock signal; means for coupling the output of said filter to the input of said comparing means; a variable counter; a voltage controlled oscillator, means for coupling said comparing means output voltage to the input of said voltage controlled oscillator; means for coupling an output of said voltage controlled oscillator to an input of said variable counter, which counter divides the output of said oscillator by a count "N" to generate said clock signal; and a controller responsive to said comparing means output to vary said pass band of said filter to match said phase encoded data signal frequency and to vary "N" to maintain the voltage input to said voltage controlled oscillator within the deviation band width of said voltage controlled oscillator.
Claim 2
Dependent Claim 222 words
A self-clocking system for demodulating phase encoded data signals which have a variable frequency, comprising in combination; means for generating a baseband data signal; means coupling said baseband signal to an input of a filter having a pass band matched to the frequency of said phase encoded data signal, said filter producing a filtered output data signal in response to said baseband signal input; means for comparing said filtered output data signal with a clock signal, said comparing means producing an output voltage which is a function of a phase difference between said filtered output data signal and said clock signal; means for coupling the output of said filter to the input of said comparing means; a variable counter; a voltage controlled oscillator, means for coupling said comparing means output voltage to the input of said voltage controlled oscillator; means for coupling an output of said voltage controlled oscillator to an input of said variable counter, which counter divides the output of said oscillator by a count "N" to generate said clock signal; and a controller responsive to said comparing means output to vary said pass band of said filter to match said phase encoded data signal frequency and to vary "N" to maintain the voltage input to said voltage controlled oscillator within the deviation band width of said voltage controlled oscillator.
Claim 3
Dependent Claim 39 words
A self-clocking system for demodulating phase encoded data signals which have a variable rate, as in claim 1 wherein said controller computes said data frequency from the voltage controlled oscillator input voltage and the count "N" in said counter.
Claim 4
Dependent Claim 36 words
A self-clocking system for demodulating phase encoded data signals which have a variable rate, as in claim 1, wherein values of "N" are larger than the voltage controlled oscillator center frequency to deviation band width ratio.

References Cited (Backward Citations)

US3831195A Cited
US4205277A Cited
US4300173A Cited
US4534044A Cited
US4737866A Cited
US4683445A Cited
US4862299A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-02-11 1994-08-13 1995-02-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-02-11 1998-08-13 1999-02-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-02-11 2002-08-13 2003-02-12 $7700.00 Window Closed / Lapsed

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