US4534044A
Expired / Lapsed
US
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Diskette read data recovery system
Assignee: Bull HN Information Systems Inc
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Filing: 1983-05-02
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Granted: 1985-08-06
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Expires: 2003-05-02
Abstract
Abstract A diskette read data recovery system generates a clock which is locked to an incoming data stream. In a phase locked loop, a signal generated by an oscillator and frequency dividers is compared in phase to the incoming data stream to provide first or second signals depending on whether the incoming data signal leads or lags the clock signal. In order that the system may handle different types of incoming signals, different frequency divider circuits in the phase locked loop are selected for different incoming signals.
Inventors
- 👤 Michael J. Funke
- 👤 Douglas A. Topliffe
- 👤 Donald J. Rathbun
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 20:27
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/089; H03L7/0891; G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1407; G11B20/1419; G11B20/1423; H03L7/16; H03L7/18; H03L7/183
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
187 words
A read data recovery system for generating a clock which is locked to an incoming data stream comprising: (a) a clock means including an oscillator and frequency divider for generating clock signals in synchronism to incoming data signals; (b) second means coupled to said clock means for comparing the phase of the clock signals with the phase of the incoming data signals, and including third means for providing a first signal when the phase of the incoming data signal leads the phase of the incoming data signal and further including fourth means for providing a second signal when the phase of incoming data signal lags the phase of the clock signal; (c) fifth means coupled to said second means and responsive to said third and fourth means for either increasing or decreasing the frequency of the clock signals; and (d) sixth means for selecting and applying to the second means a first frequency divided ouput from the oscillator when the system receives data signals having a first frequency and a second frequency divided output from the oscillator when the system receives data signals having a second frequency.
Claim 2
Dependent Claim
187 words
A read data recovery system for generating a clock which is locked to an incoming data stream comprising: (a) a clock means including an oscillator and frequency divider for generating clock signals in synchronism to incoming data signals; (b) second means coupled to said clock means for comparing the phase of the clock signals with the phase of the incoming data signals, and including third means for providing a first signal when the phase of the incoming data signal leads the phase of the incoming data signal and further including fourth means for providing a second signal when the phase of incoming data signal lags the phase of the clock signal; (c) fifth means coupled to said second means and responsive to said third and fourth means for either increasing or decreasing the frequency of the clock signals; and (d) sixth means for selecting and applying to the second means a first frequency divided ouput from the oscillator when the system receives data signals having a first frequency and a second frequency divided output from the oscillator when the system receives data signals having a second frequency.
Claim 3
Dependent Claim
35 words
The read recovery data system as recited in claim 1 including seventh means coupled to said clock means and to said second means for determining the frequency response of said clock means and second means.
Claim 4
Dependent Claim
36 words
The read recovery data system as recited in claim 2 including eighth means coupled to said second and seventh means for providing a high impedance load to said seventh means and further providing high frequency filtering.
Claim 5
Dependent Claim
46 words
The read recovery data system as recited in claim 3 further comprising two monostable multivibrators with one providing a 500 nanosecond pulse and the other providing a 1000 nanosecond pulse for alternatively receiving the incoming data stream and applying a data stream to the second means.
Claim 6
Dependent Claim
17 words
The read recovery data system as recited in claim 4 wherein the second means comprises JK flip-flops.
Claim 7
Dependent Claim
18 words
The read recovery data system as recited in claim 5 wherein said oscillator is a voltage controlled oscillator.
Claim 8
Dependent Claim
17 words
The read data recovery system as recited in claim 1 wherein said sixth means is a multiplexer.
Claim 9
Independent Claim
126 words
A method of synchronizing clock signals and incoming data signals which are up to 8% out of synchonism comprising the steps of: (a) generating clock signals; (b) comparing the phase of the clock signals with the phase of the incoming data signals; (c) providing a first signal when the phase of the incoming data signals leads the phase of the clock signals; (d) providing a second signal when the phase of the incoming data signals lags the clock signals; (e) increasing or decreasing the frequency of the clock signals in response to the first or second signals respectively; and (f) changing the frequency of the clock signals from a first frequency to a second frequency to match a change in frequency of the data signals received.
Claim 10
Independent Claim
126 words
A method of synchronizing clock signals and incoming data signals which are up to 8% out of synchonism comprising the steps of: (a) generating clock signals; (b) comparing the phase of the clock signals with the phase of the incoming data signals; (c) providing a first signal when the phase of the incoming data signals leads the phase of the clock signals; (d) providing a second signal when the phase of the incoming data signals lags the clock signals; (e) increasing or decreasing the frequency of the clock signals in response to the first or second signals respectively; and (f) changing the frequency of the clock signals from a first frequency to a second frequency to match a change in frequency of the data signals received.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-08-05 | 1989-02-04 | 1989-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-08-05 | 1993-02-04 | 1993-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-08-05 | 1997-02-04 | 1997-08-06 | $7700.00 | Window Closed / Lapsed |