US4464638A
Expired / Lapsed
US
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Universal digital frequency synthesizer using single side band techniques
Assignee: RCA Corp
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Filing: 1981-11-30
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Granted: 1984-08-07
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Expires: 2001-11-30
Abstract
Abstract An improvement in a digital frequency synthesizer comprising a voltage-controlled oscillator (VCO) for producing a signal S VCO having a frequency f VCO , a first signal generator for generating a plurality of signals S AS having a spectrum of frequencies f AS , all exceeding a given minimum frequency f M , a mixer responsive to S VCO and to S AS to produce an output signal having a frequency (f VCO ±f AS ), a divide-by-N divider responsive to (f VCO ±f AS ) to produce a signal S N having a frequency f N , a second signal generator for generating a first reference signal S R1 having a frequency f R1 , a phase detector responsive to S N and S R1 to produce a d.c. control signal E c whose amplitude varies with the phase relation of S N and S R1 , and a filter for supplying E c back to said VCO, the VCO being responsive to E c to produce an output signal S VCO of frequency f VCO where (f VCO ±f AS )=Nf R1 , an improvement for generating signals in the frequency range Nf R1 ±f M and comprising a third signal generator for generating a second reference signal S R2 having a frequency f R2 where (Nf R2 +f M )≦(Nf R1 -f M ). Also provided is logic responsive to system frequency requirements that the VCO generate a signal having a frequency between (Nf R1 ±f M ) to supply S R2 to the phase detector in lieu of S R1 .
Inventors
- 👤 Albert T. Crowley
- 👤 Robert M. Lisowski
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 08:45
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/16; H03L7/18; H03L7/183; H03L7/185
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
188 words
In a phase locked loop frequency synthesizer having a loop bandwidth of X KHz and comprising a voltage controlled oscillator (VCO) for generating a signal S VCO of frequency f VCO , means for selectively increasing or decreasing f VCO by a variable frequency f AS whose minimum value ≧MX KHz, and where M>1, to selectively produce a spectrum of signals of frequencies (f VCO ±f AS ), means for dividing the frequencies (f VCO ±f AS ) by N to produce a signal S N of frequency f N =(f VCO ±f AS )/N, means for generating a first reference signal S R1 of frequency f R1 , logic including phase comparing means for comparing S N with S R1 to produce a control signal E c , said VCO being responsive to E c to alter its frequency so that (f VCO ±f AS )/N=f R1 ; means for generating a second reference signal S R2 of frequency f R2 , where (Nf R2 +M KHz)≦Nf R1 -M KHz; and means for supplying S R2 to said phase comparing means in lieu of S R1 .
Claim 2
Dependent Claim
188 words
In a phase locked loop frequency synthesizer having a loop bandwidth of X KHz and comprising a voltage controlled oscillator (VCO) for generating a signal S VCO of frequency f VCO , means for selectively increasing or decreasing f VCO by a variable frequency f AS whose minimum value ≧MX KHz, and where M>1, to selectively produce a spectrum of signals of frequencies (f VCO ±f AS ), means for dividing the frequencies (f VCO ±f AS ) by N to produce a signal S N of frequency f N =(f VCO ±f AS )/N, means for generating a first reference signal S R1 of frequency f R1 , logic including phase comparing means for comparing S N with S R1 to produce a control signal E c , said VCO being responsive to E c to alter its frequency so that (f VCO ±f AS )/N=f R1 ; means for generating a second reference signal S R2 of frequency f R2 , where (Nf R2 +M KHz)≦Nf R1 -M KHz; and means for supplying S R2 to said phase comparing means in lieu of S R1 .
Claim 3
Dependent Claim
185 words
In a phase locked loop frequency synthesizer having a loop bandwidth of X KHz, and comprising a voltage-controlled oscillator (VCO) for generating in-quadrature signals S VCO , of frequency f VCO , a first signal generating means for generating a spectrum of in-quadrature signals S AS , of frequency f AS , all exceeding MX KHz, where M>1, logic means for processing said signals S VCO and S AS to produce an output signal S N of frequency f N =(f VCO ±f AS )/N, where N is an integer, means for generating a first reference signal S R1 of frequency f R1 , and phase detecting means for comparing the phase of said signals of S N and S R1 to produce a control signal E c , said VCO responsive to E c to alter its frequency output so that f N =f R1 ; means for generating a second reference signal S R2 of frequency f R2 where (Nf R2 +M KHz)≦(Nf R1 -M KHz); and means for supplying S R2 to said phase detecting means in lieu of S R1 .
Claim 4
Dependent Claim
185 words
In a phase locked loop frequency synthesizer having a loop bandwidth of X KHz, and comprising a voltage-controlled oscillator (VCO) for generating in-quadrature signals S VCO , of frequency f VCO , a first signal generating means for generating a spectrum of in-quadrature signals S AS , of frequency f AS , all exceeding MX KHz, where M>1, logic means for processing said signals S VCO and S AS to produce an output signal S N of frequency f N =(f VCO ±f AS )/N, where N is an integer, means for generating a first reference signal S R1 of frequency f R1 , and phase detecting means for comparing the phase of said signals of S N and S R1 to produce a control signal E c , said VCO responsive to E c to alter its frequency output so that f N =f R1 ; means for generating a second reference signal S R2 of frequency f R2 where (Nf R2 +M KHz)≦(Nf R1 -M KHz); and means for supplying S R2 to said phase detecting means in lieu of S R1 .
Claim 5
Dependent Claim
266 words
In a digital frequency synthesizer comparing a voltage-controlled oscillator (VCO) for producing a signal S VCO , having a variable frequency f VCO , means for generating a variable signal S AS having a variable frequency f AS exceeding a given mininum frequency f M , mixer means responsive to said signals S VCO and S AS to produce an output signal having a spectrum of frequencies (f VCO ±f AS ), divide-by-N means responsive to (f VCO ±f AS ) to produce a signal S N having a frequency f N , reference signal generating means for generating a first reference signal S R1 having a frequency f R1 , phase detector means responsive to said signals S N and S R1 to produce a d.c. control signal E c whose amplitude varies with the phase relation of said signals S N and S R1 , and filter means for supplying E c back to said VCO, said VCO being responsive to E c to produce an output signal of frequency (f VCO ±f AS )=Nf R1 , an improvement for generating signals in the frequency range (Nf R1 ±f M ) comprising: means for generating a second reference signal S R2 having a frequency f R2 where (Nf R2 +f M )≦(Nf R1 -f M ); and means responsive to system frequency requirement that said VCO generate a signal having a frequency between Nf R1 ±f M to disconnect said first reference signal generating means from said phase detector means and to connect said second reference signal generating means to said phase detector means.
Claim 6
Dependent Claim
266 words
In a digital frequency synthesizer comparing a voltage-controlled oscillator (VCO) for producing a signal S VCO , having a variable frequency f VCO , means for generating a variable signal S AS having a variable frequency f AS exceeding a given mininum frequency f M , mixer means responsive to said signals S VCO and S AS to produce an output signal having a spectrum of frequencies (f VCO ±f AS ), divide-by-N means responsive to (f VCO ±f AS ) to produce a signal S N having a frequency f N , reference signal generating means for generating a first reference signal S R1 having a frequency f R1 , phase detector means responsive to said signals S N and S R1 to produce a d.c. control signal E c whose amplitude varies with the phase relation of said signals S N and S R1 , and filter means for supplying E c back to said VCO, said VCO being responsive to E c to produce an output signal of frequency (f VCO ±f AS )=Nf R1 , an improvement for generating signals in the frequency range (Nf R1 ±f M ) comprising: means for generating a second reference signal S R2 having a frequency f R2 where (Nf R2 +f M )≦(Nf R1 -f M ); and means responsive to system frequency requirement that said VCO generate a signal having a frequency between Nf R1 ±f M to disconnect said first reference signal generating means from said phase detector means and to connect said second reference signal generating means to said phase detector means.
Claim 7
Dependent Claim
298 words
In a phase locked loop frequency synthesizer having a loop bandwidth of X KHz, first signal generating means comprising a voltage-controlled oscillator (VCO) for generating a pair of in-quadrature signals S VCO and (S VCO +90°) each of a variable frequency f VCO , second signal generating means for generating a pair of variable in-quadrature signals S AS and (S AS +90°) having a variable frequency f AS , exceeding a given minimum frequency f M , where f M >X KHz, logic means including a pair of mixer means, summing means, a divide-by-N means responsive to the said two pairs of in-quadrature signals S VCO , (S VCO +90°) and S AS , (S AS +90°) to produce an output signal S N of a frequency f N =(f VCO ±f AS )/N, where f AS is added to or subtracted from f VCO depending upon the reversal or non-reversal of the phase of one of the in-quadrature signals supplied from said second signal generating means, first reference signal generating means for generating a first reference signal S R1 of frequency f R1 , and phase detector means for comparing said signals S N and S R1 to produce a control signal E c , said VCO responsive to E c to alter its output frequency f VCO until f N =f R1 , an improvement for generating frequencies in the frequency range Nf R1 ±f M comprising: second reference signal generating means for generating a second reference signal S R2 of a frequency f R2 , where (Nf R2 ±f M )≦(Nf R1 -f M ); and means for disconnecting said first reference signal S R1 from said phase detector means and for alternatively connecting said second reference signal S R2 to said phase detector means.
Claim 8
Dependent Claim
298 words
In a phase locked loop frequency synthesizer having a loop bandwidth of X KHz, first signal generating means comprising a voltage-controlled oscillator (VCO) for generating a pair of in-quadrature signals S VCO and (S VCO +90°) each of a variable frequency f VCO , second signal generating means for generating a pair of variable in-quadrature signals S AS and (S AS +90°) having a variable frequency f AS , exceeding a given minimum frequency f M , where f M >X KHz, logic means including a pair of mixer means, summing means, a divide-by-N means responsive to the said two pairs of in-quadrature signals S VCO , (S VCO +90°) and S AS , (S AS +90°) to produce an output signal S N of a frequency f N =(f VCO ±f AS )/N, where f AS is added to or subtracted from f VCO depending upon the reversal or non-reversal of the phase of one of the in-quadrature signals supplied from said second signal generating means, first reference signal generating means for generating a first reference signal S R1 of frequency f R1 , and phase detector means for comparing said signals S N and S R1 to produce a control signal E c , said VCO responsive to E c to alter its output frequency f VCO until f N =f R1 , an improvement for generating frequencies in the frequency range Nf R1 ±f M comprising: second reference signal generating means for generating a second reference signal S R2 of a frequency f R2 , where (Nf R2 ±f M )≦(Nf R1 -f M ); and means for disconnecting said first reference signal S R1 from said phase detector means and for alternatively connecting said second reference signal S R2 to said phase detector means.
References Cited (Backward Citations)
US2843740A
Cited
US2860246A
Cited
US3274511A
Cited
US3251002A
Cited
US3943459A
Cited
US4061973A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-08-07 | 1988-02-06 | 1988-08-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-08-07 | 1992-02-06 | 1992-08-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-08-07 | 1996-02-06 | 1996-08-07 | $7700.00 | Window Closed / Lapsed |