← Back to Patent Explorer
US5374586A Expired / Lapsed US ⏱️ 0.0 years remaining

Multi-LOCOS (local oxidation of silicon) isolation process

Assignee: United Microelectronics Corp
•
Filing: 1993-09-27
•
Granted: 1994-12-20
•
Expires: 2013-09-27
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A new method of local oxidation using a multiple process is described. A thin silicon oxide layer is formed over the surface of a silicon substrate. A layer of silicon nitride is deposited overlying the silicon oxide layer. The silicon oxide and silicon nitride layers are patterned to provide openings of the smallest size exposing portions of the silicon substrate to he oxidized and growing field oxide regions within these smallest size openings. The patterning and growing of field oxide regions is repeated for each larger size of opening required. The silicon nitride and silicon oxide layers are removed, thereby completing local oxidation of the integrated circuit.

Inventors

  • 👤 Cheng H. Huang
  • 👤 Water Lur

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 04:50
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/61; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0128; H10W10/10; H10W10/13

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 155 words
The method of local oxidation of an integrated circuit wherein all field oxide regions are of substantially the same thickness comprising: forming a silicon oxide layer over the surface of a silicon substrate; depositing a layer of silicon nitride overlying said silicon oxide layer; patterning said silicon oxide and silicon nitride layers to provide openings of a first size exposing portions of said silicon substrate to be oxidized; growing said field oxide regions within said openings of said first size; patterning said silicon nitride layer to provide openings of a second size exposing portions of said silicon substrate to be oxidized wherein said second size is larger than said first size; growing said field oxide regions within said openings of said second size wherein said field oxide regions within said openings of said first size increase in thickness; removing said silicon nitride and said silicon oxide layers thereby completing local oxidation of said integrated circuit.
Claim 2
Independent Claim 155 words
The method of local oxidation of an integrated circuit wherein all field oxide regions are of substantially the same thickness comprising: forming a silicon oxide layer over the surface of a silicon substrate; depositing a layer of silicon nitride overlying said silicon oxide layer; patterning said silicon oxide and silicon nitride layers to provide openings of a first size exposing portions of said silicon substrate to be oxidized; growing said field oxide regions within said openings of said first size; patterning said silicon nitride layer to provide openings of a second size exposing portions of said silicon substrate to be oxidized wherein said second size is larger than said first size; growing said field oxide regions within said openings of said second size wherein said field oxide regions within said openings of said first size increase in thickness; removing said silicon nitride and said silicon oxide layers thereby completing local oxidation of said integrated circuit.
Claim 3
Dependent Claim 20 words
The method of claim 1 wherein said silicon oxide layer has a thickness of between about 100 to 500 Angstroms.
Claim 4
Dependent Claim 20 words
The method of claim 1 wherein said silicon nitride layer has a thickness of between about 500 to 3000 Angstroms.
Claim 5
Dependent Claim 22 words
The method of claim 1 wherein said field oxide regions are grown to a thickness of between about 3000 to 10,000 Angstroms.
Claim 6
Independent Claim 131 words
The method of local oxidation of an integrated circuit wherein all field oxide regions are of substantially the same thickness comprising: forming a silicon oxide layer over the surface of a silicon substrate; depositing a layer of silicon nitride overlying said silicon oxide layer; patterning said silicon oxide and silicon nitride layers to provide openings of the same size exposing portions of said silicon substrate to be oxidized and growing said field oxide regions within said same size openings; repeating said patterning and growing of said field oxide regions for each size of openings required wherein said patterning and growing of said field oxide regions is done in increasing size order of openings and removing said silicon nitride and said silicon oxide layers thereby completing local oxidation of said integrated circuit.
Claim 7
Independent Claim 131 words
The method of local oxidation of an integrated circuit wherein all field oxide regions are of substantially the same thickness comprising: forming a silicon oxide layer over the surface of a silicon substrate; depositing a layer of silicon nitride overlying said silicon oxide layer; patterning said silicon oxide and silicon nitride layers to provide openings of the same size exposing portions of said silicon substrate to be oxidized and growing said field oxide regions within said same size openings; repeating said patterning and growing of said field oxide regions for each size of openings required wherein said patterning and growing of said field oxide regions is done in increasing size order of openings and removing said silicon nitride and said silicon oxide layers thereby completing local oxidation of said integrated circuit.
Claim 8
Dependent Claim 20 words
The method of claim 5 wherein said silicon oxide layer has a thickness of between about 100 to 500 Angstroms.
Claim 9
Dependent Claim 20 words
The method of claim 5 wherein said silicon nitride layer has a thickness of between about 500 to 3000 Angstroms.
Claim 10
Dependent Claim 22 words
The method of claim 7 wherein said field oxide regions are grown to a thickness of between about 3000 to 10,000 Angstroms.

References Cited (Backward Citations)

JPS6312149A Cited
JPS63244627A Cited
US5061654A Cited
US5234859A Cited
US5155055A Cited
US5128274A Cited
US5173438A Cited
US5134089A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-12-19 1998-06-20 1998-12-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-12-19 2002-06-20 2002-12-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-12-19 2006-06-20 2006-12-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag