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Method for the fabrication of transistor

Assignee: SK Hynix Inc
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Filing: 1993-11-23
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Granted: 1994-12-20
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Expires: 2013-11-23
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Abstract

Abstract A method for fabricating a transistor having a lightly doped drain structure is disclosed. The method comprises the steps of: forming a gate insulating film over a first conductive semiconductor substrate; covering the gate insulating film with a gate layer and an insulating film for gate cap, in due order; forming an insulating film for mask over the insulating film for gate cap; applying an etch process to the insulating film for mask to remove a predetermined portion of the insulating film for mask; forming a pair of spacers at both sides of the etched portion of the insulating film for mask; implanting first conductive impurity ions; burying a first material layer in the etched portion of the insulating film for mask; removing the spacers; implanting second impurity ions at a low density to form two lightly doped regions in the semiconductor substrate; removing the first material; burying a second material layer in the etched portion of the insulating film for mask, again; removing the insulating film for mask; applying an etch process to the insulating film for gate cap and the gate layer by use of the second material layer as a mask to form a gate cap insulating film and a gate; and implanting a second conductive impurity ions at a high density to form a high density source region and a high density drain region.

Inventors

  • 👤 Ho Y. Kwon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 07:55
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0225; H10D30/60; H10D30/601; H10D30/605; H10D30/0217

Claims Analysis

Total Claims: 18
Claim 1
Independent Claim 219 words
A method for fabricating a transistor device, comprising of the steps of: forming a gate insulating film over a first conductive semiconductor substrate; covering said gate insulating film with a gate layer and an insulating film for gate cap, in due order; forming an insulating film for mask over said insulating film for gate cap; applying an etch process to said insulating film for mask to remove a portion of said insulating film for mask; forming a pair of spacers at both sides of the etched portion of said insulating film for mask; implanting first conductive impurity ions; depositing a first material layer in the etched portion of said insulating film for mask; removing said spacers; implanting second impurity ions at a low density to form two lightly doped regions in the semiconductor substrate; removing said first material; depositing a second material layer in the etched portion of said insulating film for mask, again; removing said insulating film for mask; applying an etch process to said insulating film for gate cap and said gate layer by use of said second material layer as a mask to form a gate cap insulating film and a gate; and implanting a second conductive impurity ions at a high density to form a high density source region and a high density drain region.
Claim 2
Independent Claim 219 words
A method for fabricating a transistor device, comprising of the steps of: forming a gate insulating film over a first conductive semiconductor substrate; covering said gate insulating film with a gate layer and an insulating film for gate cap, in due order; forming an insulating film for mask over said insulating film for gate cap; applying an etch process to said insulating film for mask to remove a portion of said insulating film for mask; forming a pair of spacers at both sides of the etched portion of said insulating film for mask; implanting first conductive impurity ions; depositing a first material layer in the etched portion of said insulating film for mask; removing said spacers; implanting second impurity ions at a low density to form two lightly doped regions in the semiconductor substrate; removing said first material; depositing a second material layer in the etched portion of said insulating film for mask, again; removing said insulating film for mask; applying an etch process to said insulating film for gate cap and said gate layer by use of said second material layer as a mask to form a gate cap insulating film and a gate; and implanting a second conductive impurity ions at a high density to form a high density source region and a high density drain region.
Claim 3
Dependent Claim 13 words
A method according to claim 1, wherein said gate is formed of polysilicon.
Claim 4
Dependent Claim 19 words
A method according to claim 1, wherein said gate is formed by depositing polysilicon and silicide, in due order.
Claim 5
Dependent Claim 18 words
A method according to claim 1, wherein said gate cap insulating film is formed of an oxide film.
Claim 6
Dependent Claim 25 words
A method according to claim 1, wherein materials constituting said insulating film for mask and said gate cap insulating film are different from each other.
Claim 7
Dependent Claim 22 words
A method according to claim 1, wherein materials constituting said spacers and said insulating film for mask are different from each other.
Claim 8
Dependent Claim 24 words
A method according to claim 1, wherein said insulating film for mask and said spacers are formed of a nitride film and polysilicon, respectively.
Claim 9
Dependent Claim 24 words
A method according to claim 1, wherein said insulating film for mask and said spacers are formed of polysilicon and a nitride film, respectively.
Claim 10
Dependent Claim 33 words
A method according to claim 1, wherein said first material layer is formed of a material different from materials for said gate cap insulating film, said insulating film for mask and said spacers.
Claim 11
Dependent Claim 29 words
A method according to claim 1, wherein said second material layer is formed of a material different from materials for said gate cap insulating film and said insulating film.
Claim 12
Dependent Claim 19 words
A method according to claim 9, wherein said first material layer and said second material layer serve as photoresists.
Claim 13
Dependent Claim 26 words
A method according to claim 1, wherein said step of implanting said first conductive impurity ions is carried out in order to control a threshold voltage.
Claim 14
Dependent Claim 34 words
A method according to claim 1, which further comprises the step of implanting impurity ions in order to form a punch through stop region after said step of implanting said first conductive impurity ions.
Claim 15
Dependent Claim 18 words
A method according to claim 1, wherein said first conductive semiconductor substrate is a p type semiconductor substrate.
Claim 16
Dependent Claim 23 words
A method according to claim 1, wherein said first conductive semiconductor substrate is a p type semiconductor substrate having an n well therein.
Claim 17
Dependent Claim 18 words
A method according to claim 1, wherein said first conductive semiconductor substrate is an n type semiconductor substrate.
Claim 18
Dependent Claim 23 words
A method according to claim 1, wherein said first conductive semiconductor substrate is a p type semiconductor substrate having a p well therein.

References Cited (Backward Citations)

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US4745082A Cited
US4939154A Cited
US5238859A Cited
US4997778A Cited
US5082794A Cited
US4948745A Cited
US5200352A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-12-19 1998-06-20 1998-12-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-12-19 2002-06-20 2002-12-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-12-19 2006-06-20 2006-12-20 $7700.00 Window Closed / Lapsed

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