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US5372872A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilayer printed circuit board

Assignee: NEC Corp
•
Filing: 1993-11-29
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Granted: 1994-12-13
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Expires: 2013-11-29
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Abstract

Abstract A multilayer printed circuit board reducing cross-talk noise between signal interconnection layers and between through-holes for connecting the signal interconnection layers is disclosed. The multilayer printed circuit board has printed substrates each formed thereon an interconnection layer, and prepreg sandwiched therebetween. The prepreg comprises an reinforcement lattice cloth formed of rovings of a electroconductive material maintained at a ground potential and a dielectric resin impregnated thereinto and forming a dielectric solid layer having through-holes penetrating therethrough. The electroconductive reinforcement lattice cloth functions as a ground layer between signal interconnection layers and between through-holes . The rovings may be of a metal or a semiconductive material such as carbon fiber. The multilayer printed circuit board is superior in heat resistance, dimensional stability and mechanical strength.

Inventors

  • 👤 Yoshitsugu Funada
  • 👤 Koji Matsui

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 15:03
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4611; H05K3/4614; H05K3/462; H05K3/4641; H05K1/00; H05K1/02; H05K1/0213; H05K1/0216; H05K1/0218; H05K1/0219; H05K1/0224; H05K2201/00; H05K2201/02; H05K2201/0275; H05K2201/0281; H05K2201/029; H05K2201/03; H05K2201/032; H05K2201/0323; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09536; H05K2201/10; H05K2201/10227; H05K2201/10378; H05K3/4623; Y; Y10; Y10T; Y10T428/00; Y10T428/24; Y10T428/24802; Y10T428/24926; Y10T428/31504; Y10T428/31511; Y10T428/31515; Y10T428/31522

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 135 words
A multilayer printed circuit board comprising: a first and a second dielectric substrates each having at least one interconnection layer formed on a surface thereof; and a third dielectric substrate sandwiched between said first and second dielectric substrates and integrally molded with said first and second dielectric substrates to form a unitary body of said substrates, said third dielectric substrate being composed of an electroconductive reinforcement lattice cloth maintained at a certain potential and a dielectric resin impregnated in and covering said reinforcement lattice cloth, said electroconductive reinforcement lattice cloth comprising intermeshed conductive rovings defining interstices therebetween, said dielectric resin forming a dielectric solid layer having through-holes penetrating therethrough within aid interstices of said electroconductive reinforcement lattice cloth to thereby provide an electrical connection between said interconnection layers of said first and second dielectric substrates.
Claim 2
Dependent Claim 135 words
A multilayer printed circuit board comprising: a first and a second dielectric substrates each having at least one interconnection layer formed on a surface thereof; and a third dielectric substrate sandwiched between said first and second dielectric substrates and integrally molded with said first and second dielectric substrates to form a unitary body of said substrates, said third dielectric substrate being composed of an electroconductive reinforcement lattice cloth maintained at a certain potential and a dielectric resin impregnated in and covering said reinforcement lattice cloth, said electroconductive reinforcement lattice cloth comprising intermeshed conductive rovings defining interstices therebetween, said dielectric resin forming a dielectric solid layer having through-holes penetrating therethrough within aid interstices of said electroconductive reinforcement lattice cloth to thereby provide an electrical connection between said interconnection layers of said first and second dielectric substrates.
Claim 3
Dependent Claim 29 words
The multilayer printed circuit board as defined in claim 1, wherein said dielectric resin includes a thermosetting resin having a thermal deformation temperature not lower than about 200° C.
Claim 4
Dependent Claim 27 words
The multilayer printed circuit board as defined in claim 1, wherein said electroconductive reinforcement lattices cloth has a specific resistance ranging from 10 -2 to 10° Ω-cm.
Claim 5
Dependent Claim 19 words
The multilayer printed circuit board as defined in claim 3, wherein said electroconductive reinforcement lattice cloth comprises carbon fiber.
Claim 6
Dependent Claim 28 words
The multilayer printed circuit board as defined in claim 1, wherein said electroconductive reinforcement lattice cloth is composed of rovings made of a plurality of solid metal wires.
Claim 7
Dependent Claim 34 words
The multilayer printed circuit board as defined in claim 1, wherein said electroconductive reinforcement lattice cloth has a mesh size equal to integral multiples of the pitch of signal lines of said interconnection layers.
Claim 8
Dependent Claim 26 words
The multilayer printed circuit board as defined in claim 1, wherein said electroconductive reinforcement lattice cloth has a mesh size ranging from 80 to 100 μm.
Claim 9
Dependent Claim 58 words
The multilayer printed circuit board as defined in claim 1, wherein said certain potential is a ground potential, whereby said electroconductive reinforcement lattice cloth 1 functions as a ground layer for said interconnection layers of said first and second dielectric substrates, thereby reducing cross-talk noise between said first and second interconnection layers and adjacent ones of said through-holes.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-12-12 1998-06-13 1998-12-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-12-12 2002-06-13 2002-12-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-12-12 2006-06-13 2006-12-13 $7700.00 Window Closed / Lapsed

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