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US5367658A
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Interrupt management method
Assignee: Veritas Technologies LLC
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Filing: 1992-10-07
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Granted: 1994-11-22
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Expires: 2012-10-07
Abstract
Abstract A method of increasing the amount of directly addressable memory address locations that can be allocated to RAM. An initialization routine is executed to identify ROM's in reserved memory address space that are to be reallocated. Suitable address space in extended memory is located and the ROM's are mapped into extended memory address space. A ROM access interceptor routine is implemented to trap ROM accesses and direct them to the reallocated address space. A ROM access handler routine is implemented to contain the ROM execution and to restore the computer system to a condition where it can continue execution of application or system software after the ROM access is completed. Memory addresses in reserved address space formerly allocated to ROM's can be reallocated to RAM or other memory devices.
Inventors
- 👤 Dan Spear
- 👤 Larry Mayer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 20:24
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/14; G06F12/1458; G06F12/1491; G06F12/02; G06F12/0223; G06F12/0292
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
135 words
A method for detecting execution of a first interrupt flag related instruction in a computer system having a processing means, a communication means coupled to said processing means, and a memory means coupled to said processing means through said communication means, said method comprising the steps of: detecting, using said processing means, an execution of a second interrupt flag related instruction that results in a general protection exception; adjusting, using said processing means, a stack limit of a stack in said computer system in response to said detecting step; causing a violation of said stack limit by executing in said computer system said first interrupt flag related instruction to attempt an access to said stack beyond said stack limit; and detecting, in said computer system, said violation of said stack limit caused by said access.
Claim 2
Independent Claim
135 words
A method for detecting execution of a first interrupt flag related instruction in a computer system having a processing means, a communication means coupled to said processing means, and a memory means coupled to said processing means through said communication means, said method comprising the steps of: detecting, using said processing means, an execution of a second interrupt flag related instruction that results in a general protection exception; adjusting, using said processing means, a stack limit of a stack in said computer system in response to said detecting step; causing a violation of said stack limit by executing in said computer system said first interrupt flag related instruction to attempt an access to said stack beyond said stack limit; and detecting, in said computer system, said violation of said stack limit caused by said access.
Claim 3
Dependent Claim
19 words
The method of claim 1 wherein said stack limit is adjusted to a present value of a stack pointer.
Claim 4
Dependent Claim
18 words
The method of claim 1 wherein said second interrupt flag related instruction is a clear interrupt instruction (CLI).
Claim 5
Dependent Claim
18 words
The method of claim 1 wherein said second interrupt flag related instruction is a set interrupt instruction (STI).
Claim 6
Dependent Claim
28 words
The method of claim 1 wherein said first interrupt flag related instruction is a pop flags (POPF) instruction that pops a plurality of stack entries from said stack.
Claim 7
Dependent Claim
28 words
The method of claim 1 wherein said first interrupt flag related instruction is an interrupt return (IRET) instruction that pops a plurality of stack entries from said stack.
Claim 8
Dependent Claim
18 words
The method of claim 1 wherein said violation of said stack limit results in a general protection exception.
References Cited (Backward Citations)
US4926322A
Cited
US5123098A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-21 | 1998-05-23 | 1998-11-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-21 | 2002-05-23 | 2002-11-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-21 | 2006-05-23 | 2006-11-22 | $7700.00 | Window Closed / Lapsed |