US5367638A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Digital data processing circuit with control of data flow by control of the supply voltage
Assignee: US Philips Corp
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Filing: 1992-09-25
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Granted: 1994-11-22
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Expires: 2012-09-25
Abstract
Abstract Digital data processing electronic circuitry based on self-timed elements. The operating speed of the electronic circuitry is determined by its power supply voltage. Moreover, a buffer is connected either to the input or to the output of the electronic circuitry. A filling degree signal from the buffer is fed back to a control input of a power supply voltage controller for the electronic circuitry. In this way the supply voltage of the electronic circuitry is adjusted to control the data flow in such a way that the buffer tends not to fill up or to become empty.
Inventors
- 👤 Cornelis Niessen
- 👤 Cornelis H. van Berkel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 09:39
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/06; G06F1/00; G06F1/26; G06F1/32; G06F13/00; G06F2205/00; G06F2205/06; G06F2205/061
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
101 words
A digital apparatus comprising: buffer means for receiving and intermediate storage of data and subsequent outputting thereof to a data processing means, said data processing means comprising electronic integrated circuitry based on self-timed elements wherein the operating speed of said electronic circuitry is directly determined by its supply voltage, a source of power supply voltage for said electronic circuitry, and feedback means for, under control of a filling degree signal of said buffer means, controlling, via said supply voltage source, the actual power supply voltage of said electronic circuitry for dynamically controlling the data handling rate of said data processing means.
Claim 2
Dependent Claim
101 words
A digital apparatus comprising: buffer means for receiving and intermediate storage of data and subsequent outputting thereof to a data processing means, said data processing means comprising electronic integrated circuitry based on self-timed elements wherein the operating speed of said electronic circuitry is directly determined by its supply voltage, a source of power supply voltage for said electronic circuitry, and feedback means for, under control of a filling degree signal of said buffer means, controlling, via said supply voltage source, the actual power supply voltage of said electronic circuitry for dynamically controlling the data handling rate of said data processing means.
Claim 3
Dependent Claim
15 words
The digital apparatus as claimed in claim 1, wherein said self-timed elements are delay-insensitive elements.
Claim 4
Dependent Claim
18 words
The digital apparatus as claimed in claim 2, wherein said delay-insensitive elements have interelement interfacing by handshake means.
Claim 5
Dependent Claim
144 words
A digital apparatus comprising: data source means including integrated digital data processing asynchronous electronic circuitry based on self-timed elements wherein the operating speed of said electronic circuitry is directly determined by its power supply voltage, a source of power supply voltage coupled to said data source means to provide the power supply voltage for said electronic circuitry, buffer storage means receiving data from said data source means and providing intermediate storage of said data and a subsequent output thereof, and feedback means coupled to said source of power supply voltage and, under the control of a filling degree signal of said buffer storage means, controlling the source of power supply voltage to vary the actual supply voltage provided to said electronic circuitry so as to dynamically control the data handling rate of said data source means as a function of the filling degree signal.
Claim 6
Dependent Claim
144 words
A digital apparatus comprising: data source means including integrated digital data processing asynchronous electronic circuitry based on self-timed elements wherein the operating speed of said electronic circuitry is directly determined by its power supply voltage, a source of power supply voltage coupled to said data source means to provide the power supply voltage for said electronic circuitry, buffer storage means receiving data from said data source means and providing intermediate storage of said data and a subsequent output thereof, and feedback means coupled to said source of power supply voltage and, under the control of a filling degree signal of said buffer storage means, controlling the source of power supply voltage to vary the actual supply voltage provided to said electronic circuitry so as to dynamically control the data handling rate of said data source means as a function of the filling degree signal.
Claim 7
Dependent Claim
15 words
The digital apparatus as claimed in claim 4, wherein said self-timed elements are delay-insensitive elements.
Claim 8
Dependent Claim
18 words
The digital apparatus as claimed in claim 5, wherein said delay-insensitive elements have interelement interfacing by handshake means.
Claim 9
Dependent Claim
13 words
The digital apparatus as claimed in claim 4, wherein said apparatus is battery-powered.
Claim 10
Dependent Claim
13 words
The digital apparatus as claimed in claim 4, wherein said apparatus is portable.
Claim 11
Dependent Claim
12 words
The digital apparatus as claimed in claim 4, further including telephone circuitry.
Claim 12
Dependent Claim
29 words
The digital apparatus as claimed in claim 4 wherein said data processing electronic circuitry is programmed for error correction of said data as based on digital error correcting code.
Claim 13
Dependent Claim
35 words
The digital apparatus as claimed in claim 4, wherein said data processing electronic circuitry is programmed for data conversion as based on at least one of conversion key, conversion table and a conversion expression set.
Claim 14
Dependent Claim
18 words
The digital apparatus as claimed in claim 4 wherein said data processing electronic circuitry includes high-speed dubbing means.
Claim 15
Dependent Claim
18 words
The digital apparatus claimed in claim 4 wherein said data is received by broadcast via a physical medium.
Claim 16
Dependent Claim
20 words
The digital apparatus as claimed in claim 4, wherein said data represent at least one of audio and video information.
Claim 17
Dependent Claim
30 words
The digital apparatus as claimed in claim 4, further including stop-go control means based upon a second filling degree signal of said buffer storage means effective on said electronic circuitry.
Claim 18
Dependent Claim
158 words
Apparatus for controlling the flow of data in an electronic digital data processing circuit, said apparatus comprising: digital data processing electronic circuitry based on self-timed circuit elements wherein the operating speed of said electronic circuitry is determined by an energizing voltage supplied to said electronic circuitry, a voltage regulator coupled to said digital data processing electronic circuitry for supplying the energizing voltage thereto, buffer storage means for the intermediate storage of digital data and the subsequent supply thereof, means for coupling said buffer storage means to said digital data processing electronic circuitry, and feedback means which, under control of a filling degree signal of said buffer storage means, controls the voltage regulator so as to adjust the level of the energizing voltage supplied to the digital data processing electronic circuitry so as to dynamically control the rate of flow of data in said digital data processing electronic circuitry and thereby control data flow through the buffer storage means.
Claim 19
Dependent Claim
158 words
Apparatus for controlling the flow of data in an electronic digital data processing circuit, said apparatus comprising: digital data processing electronic circuitry based on self-timed circuit elements wherein the operating speed of said electronic circuitry is determined by an energizing voltage supplied to said electronic circuitry, a voltage regulator coupled to said digital data processing electronic circuitry for supplying the energizing voltage thereto, buffer storage means for the intermediate storage of digital data and the subsequent supply thereof, means for coupling said buffer storage means to said digital data processing electronic circuitry, and feedback means which, under control of a filling degree signal of said buffer storage means, controls the voltage regulator so as to adjust the level of the energizing voltage supplied to the digital data processing electronic circuitry so as to dynamically control the rate of flow of data in said digital data processing electronic circuitry and thereby control data flow through the buffer storage means.
Claim 20
Dependent Claim
56 words
Data control apparatus as claimed in claim 16, wherein said buffer storage means comprises a digital buffer storage device coupled either to an input or an output of the digital data processing electronic circuitry and to the voltage regulator, said data control apparatus further comprising a battery as a source of voltage for the voltage regulator.
Claim 21
Dependent Claim
40 words
Data control apparatus as claimed in claim 16, wherein said voltage regulator provides a relatively smooth adjustment of the energizing voltage level and said data control apparatus further comprises a battery as a source of voltage for the voltage regulator.
Claim 22
Dependent Claim
46 words
Data control apparatus as claimed in claim 18, further comprising means providing a stop-go control of the flow of data between the buffer storage means and the digital data processing electronic circuitry as a function of a second filling degree signal of the buffer storage means.
Claim 23
Dependent Claim
49 words
Data control apparatus as claimed in claim 16 which comprises a portable apparatus powered by a battery and including asynchronous electronic circuits, said voltage regulator, under control of the filling degree signal of the buffer storage means, being operative to reduce the power consumption of the asynchronous electronic circuits.
Claim 24
Dependent Claim
60 words
Data control apparatus as claimed in claim 16, further comprising a battery as a source of voltage for the voltage regulator, and wherein said voltage regulator adjusts the energizing voltage level in response to said filling degree signal so as to control the data flow rate such that the buffer storage means does not overflow nor does it become empty.
Claim 25
Dependent Claim
142 words
A digital apparatus comprising: a data source including integrated digital data processing asynchronous electronic circuitry based on self-timed elements wherein the operating speed of said electronic circuitry is directly determined by its power supply voltage, a source of power supply voltage coupled to said data source to provide the power supply voltage for said electronic circuitry, buffer storage means coupled to said data source so as to provide intermediate storage of said data and a subsequent output thereof, and feedback means coupled to said source of power supply voltage and, under the control of a filling degree signal of said buffer storage means, controlling the source of power supply voltage to vary the actual supply voltage provided to said electronic circuitry so as to dynamically control the data handling rate of said data source as a function of the filling degree signal.
Claim 26
Dependent Claim
142 words
A digital apparatus comprising: a data source including integrated digital data processing asynchronous electronic circuitry based on self-timed elements wherein the operating speed of said electronic circuitry is directly determined by its power supply voltage, a source of power supply voltage coupled to said data source to provide the power supply voltage for said electronic circuitry, buffer storage means coupled to said data source so as to provide intermediate storage of said data and a subsequent output thereof, and feedback means coupled to said source of power supply voltage and, under the control of a filling degree signal of said buffer storage means, controlling the source of power supply voltage to vary the actual supply voltage provided to said electronic circuitry so as to dynamically control the data handling rate of said data source as a function of the filling degree signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-21 | 1998-05-23 | 1998-11-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-21 | 2002-05-23 | 2002-11-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-21 | 2006-05-23 | 2006-11-22 | $7700.00 | Window Closed / Lapsed |