P-channel sense amplifier pull-up circuit incorporating a voltage comparator for use in DRAM memories having non-bootstrapped word lines

Claim 1

A pull-up circuit for P-channel sense amplifiers in a dynamic random access memory array having non-bootstrapped word lines, said circuit comprising: a pull-up node coupled to the P-channel sense amplifiers, said P-channel sense amplifiers being coupled to digit lines within said array; a power supply bus; a reference voltage; a variable voltage; a logic gate; a differential amplifier for comparing said reference voltage to said variable voltage, said differential amplifier having an output that is coupled to a first input of said logic gate, said logic gate also having a second input for receiving an active pull-up control signal or the complement thereof, said logic gate also having an output; at least one P-channel field effect transistor, the gate of which is coupled to the output of said logic gate, and the channel of which couples said power supply bus to said pull-up node during the active pull-up cycle whenever said variable voltage is less than said reference voltage; and at least one N-channel field effect transistor, the channel of which couples said power supply bus to said pull-up node during the active pull-up cycle at least during periods that the channel of said P-channel transistor does not couple the power supply bus to said pull-up node.