US5362664A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating a semiconductor memory device
Assignee: SK Hynix Inc
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Filing: 1994-02-02
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Granted: 1994-11-08
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Expires: 2014-02-02
Abstract
Abstract This invention relates to a method for fabricating a semiconductor memory device with a large capacitance, which comprises the steps of forming a gate insulating film, a gate electrode and a source and drain region on a semiconductor substrate, forming an interlayer and an etch stopper on the whole surface, etching selectively away the etch stopper and the interlayer to form an opening, forming a first conductive layer, a first insulating film and a second insulating film on the whole surface, etching selectively away the first and second insulating film, forming a side wall spacer of a third insulating film on the side of the first and second insulating film, forming a fourth insulating film on the whole surface, etching selectively away the fourth insulating film, removing the second insulating film and the side wall spacer, forming a second conductive layer on the whole surface, etching selectively away the second conductive layer and the first insulating film and the first conductive layer, removing the fourth insulating film and the first insulating film.
Inventors
- 👤 Young K. Jun
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 08:53
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10B12/31; H10B12/318; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/042; H10D1/60; H10D1/68; H10D1/692; H10D1/696; H10D1/711; H10D1/714
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
245 words
A method for fabricating a semiconductor memory device, comprising the steps of: forming a gate insulating film on a semiconductor substrate; forming a gate electrode on the gate insulating film; forming a source and drain region in the semiconductor substrate at each side of the gate electrode; forming an interlayer and an etch stopper on the whole surface; etching selectively away the etch stopper and the interlayer to form an opening, the opening exposing the source and drain region; forming a first conductive layer on the whole surface; forming a first insulating film and a second insulating film on the whole surface, the second insulating film being etched selectively with the first insulating film; etching selectively away the first and second insulating film to expose the first conductive layer at a part of the opening; forming a side wall spacer of a third insulating film on the side of the first and second insulating film, the side wall spacer being the same material as the second insulating film; forming a fourth insulating film on the whole surface; etching selectively away the fourth insulating film to expose the second insulating film; removing the second insulating film and the side wall spacer; forming a second conductive layer on the whole surface; etching selectively away the second conductive layer and the first insulating film and the first conductive layer by using the fourth insulating film as a mask; removing the fourth insulating film and the first insulating film.
Claim 2
Independent Claim
245 words
A method for fabricating a semiconductor memory device, comprising the steps of: forming a gate insulating film on a semiconductor substrate; forming a gate electrode on the gate insulating film; forming a source and drain region in the semiconductor substrate at each side of the gate electrode; forming an interlayer and an etch stopper on the whole surface; etching selectively away the etch stopper and the interlayer to form an opening, the opening exposing the source and drain region; forming a first conductive layer on the whole surface; forming a first insulating film and a second insulating film on the whole surface, the second insulating film being etched selectively with the first insulating film; etching selectively away the first and second insulating film to expose the first conductive layer at a part of the opening; forming a side wall spacer of a third insulating film on the side of the first and second insulating film, the side wall spacer being the same material as the second insulating film; forming a fourth insulating film on the whole surface; etching selectively away the fourth insulating film to expose the second insulating film; removing the second insulating film and the side wall spacer; forming a second conductive layer on the whole surface; etching selectively away the second conductive layer and the first insulating film and the first conductive layer by using the fourth insulating film as a mask; removing the fourth insulating film and the first insulating film.
Claim 3
Dependent Claim
17 words
A method according to claim 1, wherein the first and fourth insulating film is an oxide film.
Claim 4
Dependent Claim
15 words
A method according to claim 1, wherein the second insulating film is a nitride film.
Claim 5
Dependent Claim
57 words
A method according to claim 1, wherein the step of forming the side wall spacer includes the substeps of etching selectively away the first insulating film and the second insulating film and forming the third insulating film being the sane material as the second insulating film on the whole surface, and etching back the third insulating film.
Claim 6
Dependent Claim
29 words
A method according to claim 1, wherein the step of removing the second insulating film and the side wall spacer is performed by wet etching using H3PO4 contained solution.
Claim 7
Dependent Claim
20 words
A method according to claim 1, wherein the fourth insulating film is the same material as the first insulating film.
Claim 8
Dependent Claim
23 words
A method according to claim 1, wherein the thickness of the fourth insulating film is more than that of the first insulating film.
Claim 9
Dependent Claim
49 words
A method according to claim 7, wherein the thickness of the fourth insulating film is tTop and the thickness of the first insulating film is tBott and the etched over amount of the first insulating is P(percent), the thickness of the fourth insulating film is determined as follows. tTop>(1+α)tBott
Claim 10
Dependent Claim
29 words
A method according to claim 1, wherein the step of removing the fourth insulating film and the first insulating film is performed by wet etching using HF contained solution.
Claim 11
Dependent Claim
32 words
A method according to claim 1, further comprising the step of removing the etch stopper and a remained side wall spacer after removing the fourth insulating film and the first insulating film.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-11-07 | 1998-05-09 | 1998-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-11-07 | 2002-05-09 | 2002-11-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-11-07 | 2006-05-09 | 2006-11-08 | $7700.00 | Window Closed / Lapsed |