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US5360748A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing a semiconductor device

Assignee: Toshiba Corp
•
Filing: 1993-01-22
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Granted: 1994-11-01
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Expires: 2013-01-22
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Abstract

Abstract A method of manufacturing a semiconductor device, which comprises the steps of providing a semiconductor substrate having a first primary surface which is designated to form the semiconductor device and a second primary surface opposite from the first primary surface, the substrate containing contaminants therein; forming a boron-doped layer on the second primary surface of the substrate; and absorbing the contaminants into the boron-doped layer.

Inventors

  • 👤 Soichi Nadahara
  • 👤 Kikuo Yamabe

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 07:09
CPC Classifications
H; H10; H10P; H10P36/00; H10P36/03; Y; Y10; Y10S; Y10S148/00; Y10S148/06

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 71 words
A method of manufacturing a semiconductor device, said method comprising the steps of: providing a semiconductor substrate having a first primary surface on which the semiconductor device is to be formed and a second primary surface opposite from the first primary surface, the substrate receiving contaminants therein during device manufacture; forming a separate boron-doped layer on the second primary surface of the substrate; and gettering the contaminants into the boron-doped layer.
Claim 2
Independent Claim 71 words
A method of manufacturing a semiconductor device, said method comprising the steps of: providing a semiconductor substrate having a first primary surface on which the semiconductor device is to be formed and a second primary surface opposite from the first primary surface, the substrate receiving contaminants therein during device manufacture; forming a separate boron-doped layer on the second primary surface of the substrate; and gettering the contaminants into the boron-doped layer.
Claim 3
Dependent Claim 27 words
A method according to claim 1, wherein the gettering step is conducted by using heat applied for an annealing step in the formation of the semiconductor device.
Claim 4
Dependent Claim 19 words
A method according to claim 2, wherein the annealing step is carried out at a temperature of 600°-900° C.
Claim 5
Independent Claim 99 words
A method of manufacturing a semiconductor device, said method comprising the steps of: providing a semiconductor substrate having a first primary surface on which the semiconductor device is to be formed and a second primary surface opposite from the first primary surface, the substrate receiving contaminants therein during device manufacture; forming a separate semiconductor layer containing boron on the second primary surface of the substrate; and forming the semiconductor device using at least one thermal process during which heat is applied to the substrate, thereby causing gettering of the contaminants from the substrate into the semiconductor layer containing boron.
Claim 6
Independent Claim 99 words
A method of manufacturing a semiconductor device, said method comprising the steps of: providing a semiconductor substrate having a first primary surface on which the semiconductor device is to be formed and a second primary surface opposite from the first primary surface, the substrate receiving contaminants therein during device manufacture; forming a separate semiconductor layer containing boron on the second primary surface of the substrate; and forming the semiconductor device using at least one thermal process during which heat is applied to the substrate, thereby causing gettering of the contaminants from the substrate into the semiconductor layer containing boron.
Claim 7
Dependent Claim 18 words
A method according to claim 4, wherein the thermal process is made at a temperature of 600°-900° C.
Claim 8
Dependent Claim 53 words
A method according to claim 4, wherein the thermal process satisfies an upper region of a curve which is formed by plotting (X, Y)-(600, 104), (700, 42), (800, 21), (900, 10) and (1000, 6), wherein X is a thermal process temperature in degrees Centigrade and Y is the thermal process time in minutes.
Claim 9
Independent Claim 148 words
A method of manufacturing a semiconductor device, said method comprising the steps of: providing a first semiconductor substrate having a first primary surface and a second primary surface opposite from the first primary surface; forming a first separate semiconductor layer containing boron on the first primary surface and a second separate semiconductor layer containing boron on the second primary surface of the substrate; providing a second substrate having a first primary surface and a second primary surface directly in contact with the first primary surface of the first substrate, the first primary surface of the second substrate being designated the surface on which the semiconductor device is to be formed; forming the semiconductor device using process steps including a thermal process to at least the second substrate; and gettering contaminants into the first and second boron containing semiconductor layers using the thermal process during forming the semiconductor device.
Claim 10
Independent Claim 148 words
A method of manufacturing a semiconductor device, said method comprising the steps of: providing a first semiconductor substrate having a first primary surface and a second primary surface opposite from the first primary surface; forming a first separate semiconductor layer containing boron on the first primary surface and a second separate semiconductor layer containing boron on the second primary surface of the substrate; providing a second substrate having a first primary surface and a second primary surface directly in contact with the first primary surface of the first substrate, the first primary surface of the second substrate being designated the surface on which the semiconductor device is to be formed; forming the semiconductor device using process steps including a thermal process to at least the second substrate; and gettering contaminants into the first and second boron containing semiconductor layers using the thermal process during forming the semiconductor device.
Claim 11
Dependent Claim 18 words
A method according to claim 7, wherein the applied heat is in a temperature range of 600-900° C.
Claim 12
Dependent Claim 53 words
A method according to claim 7, wherein the thermal process satisfies an upper region of a curve which is formed by plotting (X, Y)-(600, 104), (700, 42) (800, 21), (900, 10) and (1000, 6) wherein X is a thermal process temperature in degrees Centigrade and Y is the thermal process time in minutes.
Claim 13
Independent Claim 91 words
A method of manufacturing a semiconductor device and comprising the steps of: providing a semiconductor substrate having opposite first and second primary surfaces; forming a separate boron-doped layer on one of the first and second surfaces of the substrate; and forming the semiconductor device using steps including a thermal process satisfying an upper region of a curve formed by plotting (X, Y)-(600, 104), (700, 42), (800, 21), (900, 10) and (1000, 6), where X is a thermal process temperature in degrees Centigrade and Y is the thermal process time in minutes.
Claim 14
Independent Claim 91 words
A method of manufacturing a semiconductor device and comprising the steps of: providing a semiconductor substrate having opposite first and second primary surfaces; forming a separate boron-doped layer on one of the first and second surfaces of the substrate; and forming the semiconductor device using steps including a thermal process satisfying an upper region of a curve formed by plotting (X, Y)-(600, 104), (700, 42), (800, 21), (900, 10) and (1000, 6), where X is a thermal process temperature in degrees Centigrade and Y is the thermal process time in minutes.
Claim 15
Dependent Claim 22 words
A method according to claim 10, wherein a boron concentration of the boron-doped layer is more than 10 20 atoms/cm 3 .

References Cited (Backward Citations)

US4053335A Cited
US4608096A Cited
JPS60254737A Cited
US4645546A Cited
JPH03173131A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-31 1998-05-02 1998-11-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-31 2002-05-02 2002-11-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-31 2006-05-02 2006-11-01 $7700.00 Window Closed / Lapsed

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