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US5356827A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing semiconductor device

Assignee: NEC Corp
•
Filing: 1993-03-12
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Granted: 1994-10-18
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Expires: 2013-03-12
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Abstract

Abstract A method of manufacturing a semiconductor device includes the following steps. A wide groove portion is formed in a predetermined portion of one major surface of a first semiconductor substrate. A first insulating film is formed on the bottom surface of the groove portion. The major surface of the first semiconductor substrate except for the first insulating film is polished to form a mirror-polished surface on the same level as the surface of the first insulating film. One major surface of a second semiconductor substrate is bonded to the mirror-polished surface of the first semiconductor substrate and the surface of the first insulating film by direct bonding, and the resultant structure is heat-treated, thereby forming a composite semiconductor substrate. A groove having a ring-like planar shape is formed to extend from the other major surface of the first semiconductor substrate constituting the composite semiconductor substrate to the first insulating film. A second insulating film is formed on the side walls of the ring-like groove. An island-like element formation region insulated/isolated from the remaining region by the first and second insulating films is formed on the first semiconductor substrate.

Inventors

  • 👤 Tsukasa Ohoka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 00:49
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/041; H10W10/061; H10W10/10; H10W10/181; H10W10/40; H10P90/1914; Y; Y10; Y10S; Y10S148/00; Y10S148/012

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 162 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a wide groove portion in a predetermined portion of one major surface of a first semiconductor substrate, the wide groove portion having a bottom surface formed to be flat; forming a first insulating film on the bottom surface of said groove portion; polishing the major surface of said first semiconductor substrate except for a surface of said first insulating film in said groove portion to form a mirror-polished surface on the same level as the surface of said first insulating film, said polishing of the major surface of said first semiconductor device and said first insulating film having a flat face with the same level; and bonding to cause an adherence between one major surface of a second semiconductor substrate and the flat face of said first semiconductor substrate and said first insulating film without gap by direct bonding and heat-treating the resultant structure, thereby forming a composite semiconductor substrate.
Claim 2
Independent Claim 162 words
A method of manufacturing a semiconductor device, comprising the steps of: forming a wide groove portion in a predetermined portion of one major surface of a first semiconductor substrate, the wide groove portion having a bottom surface formed to be flat; forming a first insulating film on the bottom surface of said groove portion; polishing the major surface of said first semiconductor substrate except for a surface of said first insulating film in said groove portion to form a mirror-polished surface on the same level as the surface of said first insulating film, said polishing of the major surface of said first semiconductor device and said first insulating film having a flat face with the same level; and bonding to cause an adherence between one major surface of a second semiconductor substrate and the flat face of said first semiconductor substrate and said first insulating film without gap by direct bonding and heat-treating the resultant structure, thereby forming a composite semiconductor substrate.
Claim 3
Dependent Claim 81 words
A method according to claim 1, further comprising the steps of forming a groove having a planar ring shape and extending from the other major surface of said first semiconductor substrate constituting said composite semiconductor substrate to said first insulating film, and forming a second insulating film on side walls of said ring shaped groove, so that an island element formation region insulated/isolated from a remaining region by said first and second insulating films is formed on said first semiconductor substrate.
Claim 4
Dependent Claim 49 words
A method according to claim 2, wherein a power element is formed in a region, of said first semiconductor substrate, which is located outside said ring shaped groove and electrically connected to said second semiconductor substrate, and a control circuit element is formed in said island element formation region.
Claim 5
Dependent Claim 22 words
A method according to claim 3, wherein said power element is a MOSFET, and said control circuit element is a bipolar transistor.
Claim 6
Dependent Claim 28 words
A method according to claim 2, wherein said groove portion is formed to be larger than said element formation region by a width of said ring shaped groove.
Claim 7
Dependent Claim 45 words
A method according to claim 1, wherein said first semiconductor substrate is a silicon substrate of one conductivity type, and said second semiconductor substrate is a silicon substrate of one conductivity type which has an impurity concentration higher than that of said first semiconductor substrate.
Claim 8
Dependent Claim 47 words
A method according to claim 1, further comprising the step of forming an impurity region of one conductivity type, which has an impurity concentration higher than that of said first semiconductor substrate, on the bottom surface of said groove portion before said first semiconductor substrate is formed.
Claim 9
Dependent Claim 15 words
A method according to claim 1, wherein said ring shaped groove has a rectangular cross-section.
Claim 10
Dependent Claim 16 words
A method according to claim 1, wherein said ring shaped groove has an inverted triangular cross-section.
Claim 11
Independent Claim 205 words
A method of manufacturing a semiconductor device, comprising of the steps of: forming a wide groove portion in a predetermined portion of one major surface of a first semiconductor substrate, the wide groove portion having a bottom surface formed to be flat; forming a first insulating film on the bottom surface of said groove portion; polishing only the major surface of said first semiconductor substrate except for a surface of said first insulating film in said groove portion to form a mirror-polished surface on the same level as the surface of said first insulating film, said polishing of the major surface of said first semiconductor device and said first insulating film having a flat face with the same level; and bonding to cause an adherence between one major surface of a second semiconductor substrate and the flat face of said first semiconductor substrate and said first insulating film without a structure for forming a composite semiconductor substrate; and forming a second insulating film having a ring shaped planar shape and extending from the other major surface of said first semiconductor substrate of said first insulating film in order to form an island element formation region insulated/isolated form a remain region on said first semiconductor substrate.
Claim 12
Independent Claim 205 words
A method of manufacturing a semiconductor device, comprising of the steps of: forming a wide groove portion in a predetermined portion of one major surface of a first semiconductor substrate, the wide groove portion having a bottom surface formed to be flat; forming a first insulating film on the bottom surface of said groove portion; polishing only the major surface of said first semiconductor substrate except for a surface of said first insulating film in said groove portion to form a mirror-polished surface on the same level as the surface of said first insulating film, said polishing of the major surface of said first semiconductor device and said first insulating film having a flat face with the same level; and bonding to cause an adherence between one major surface of a second semiconductor substrate and the flat face of said first semiconductor substrate and said first insulating film without a structure for forming a composite semiconductor substrate; and forming a second insulating film having a ring shaped planar shape and extending from the other major surface of said first semiconductor substrate of said first insulating film in order to form an island element formation region insulated/isolated form a remain region on said first semiconductor substrate.

References Cited (Backward Citations)

US4948748A Cited
US4963505A Cited
US4784970A Cited
US5097314A Cited
US5164218A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-10-17 1998-04-18 1998-10-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-10-17 2002-04-18 2002-10-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-10-17 2006-04-18 2006-10-18 $7700.00 Window Closed / Lapsed

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