High efficiency regulator with shoot-through current limiting

Claim 2

A regulator, comprising: (a) a power input terminal; (b) a regulated power output terminal; (c) an inductor and a pass switch in series between said input terminal and said output terminal, said inductor directly connected to said output terminal and said pass switch connected to said input terminal; (d) a free-wheeling switch connecting said inductor and pass switch to ground; (e) switch control circuitry with outputs connected to control inputs of said pass switch and said free-wheeling switch, said control circuitry including a feedback from said control input of said pass switch to delay turn-on said free-wheeling switch until said pass-switch has been turned off; (f) said pass switch includes a first field effect transistor; (g) said free-wheeling switch includes a second field effect transistor; and (h) said feedback includes a diode coupled from a driver for the gate of said second transistor to the gate of said first transistor.

Claim 3

The regulator of claim 1, wherein: (a) said free-wheeling switch includes a diode in parallel with said second transistor.

Claim 4

The regulator of claim 1, wherein: (a) said control circuitry includes a voltage-to-current converter coupled from said output terminal to a capacitor; (b) wherein the voltage on said capacitor triggers said switches to switch; (c) said control circuitry further includes a pulse generator and a flip-flop with the output of said pulse generator clocking said flip-flop and with said voltage on said capacitor coupled to reset said flip-flop; and (d) wherein the output of said flip-flop couples to control inputs of said switches.

Claim 5

The regulator of claim 3, wherein: (a) said pulse generator is a timer circuit in astable connection.

Claim 6

The regulator of claim 3, wherein: (a) said control circuitry includes first and second comparators with the output of said first comparator coupled to the control input of said pass switch and the output of said second comparator coupled to the control input of said free-wheeling switch, said first comparator with inputs from said flip-flop and said second comparator with inputs from said flip-flop and the output of said first comparator.

Claim 7

The regulator of claim 5, wherein: (a) said pass switch includes a first field effect transistor; (b) said free-wheeling switch includes a second field effect transistor; (c) said control inputs are the gates of said field effect transistors; and (d) said feedback includes a diode coupled from said input of said second comparator to the gate of said first transistor.

Claim 8

A power supply system, comprising: (a) a first regulator including: (i) a first power input terminal; (ii) a first regulated power output terminal; (iii) a first inductor and a first pass switch in series between said first input terminal and said first output terminal, said first inductor directly connected to said first output terminal and said first pass switch connected to said first input terminal; (iv) a first free-wheeling switch connecting said first inductor and said first pass switch to ground; (v) first switch control circuitry with outputs connected to control inputs of said first pass switch and said first free-wheeling switch, said control circuitry including a feedback from said control input of said first pass switch to delay turn-on said first free-wheeling switch until said first pass-switch has been turned off; (b) a second regulator including: (i) a second power input terminal; (ii) a second regulated power output terminal; (iii) a second pass switch connected to said second power input terminal and coupled to said second power output terminal; (iv) second switch control circuitry with outputs connected to control inputs of said second pass switch, said second control circuitry synchronized by said first control circuitry; (c) said first, second and third transistors are n-channel and (d) said first switch control circuitry includes a voltage doubler with output coupled to the gates of said first and third transistors.

Claim 9

A power supply system, comprising: (a) a first regulator including: (i) a first power input terminal; (ii) a first regulated power output terminal; (iii) a first inductor and a first pass switch in series between said first input terminal and said first output terminal, said first inductor directly connected to said first output terminal and said first pass switch connected to said first input terminal; (iv) a first free-wheeling switch connecting said first inductor and said first pass switch to ground; (v) first switch control circuitry with outputs connected to control inputs of said first pass switch and said first free-wheeling switch, said control circuitry including a feedback from said control input of said first pass switch to delay turn-on said first free-wheeling switch until said first pass-switch has been turned off; (b) a second regulator including: (i) a second power input terminal; (ii) a second regulated power output terminal; (iii) a second pass switch connected to said second power input terminal and coupled to said second power output terminal; (iv) second switch control circuitry with outputs connected to control inputs of said second pass switch, said second control circuitry synchronized by said first control circuitry; (c) said first, second and third transistors are n-channel and (d) said first switch control circuitry includes a voltage doubler with output coupled to the gates of said first and third transistors.

Claim 10

The system in claim 7, wherein: (a) said first free-wheeling switch includes a diode in parallel with said second transistor.

Claim 11

The system of claim 7, wherein: (a) said first control circuitry includes a voltage-to-current converter coupled from said output terminal to a capacitor; (b) wherein the voltage on said capacitor triggers said first pass and first free-wheeling switches to switch; (c) said first control circuitry further includes a pulse generator and a flip-flop with the output of said pulse generator clocking said flip-flop and with said voltage on said capacitor coupled to reset said flip-flop; and (d) wherein the output of said flip-flop couples to control inputs of said first pass and first free-wheeling switches.

Claim 12

The system of claim 9, wherein: (a) said pulse generator is a first timer in astable connection; and (b) said second control circuitry includes a second timer triggered by said first timer.

Claim 13

The system of claim 9, wherein: (a) said first control circuitry includes first and second comparators with the output of said first comparator coupled to the control input of said first pass switch and the output of said second comparator coupled to the control input of said first free-wheeling switch, said first comparator with inputs from said flip-flop and said second comparator with inputs from said flip-flop and the output of said first comparator.

Claim 14

A power supply system, comprising: (a) a first regulator including: (i) a first power input terminal; (ii) a first regulated power output terminal; (iii) a first inductor and a first pass switch in series between said first input terminal and said first output terminal, said first inductor directly connected to said first output terminal and said first pass switch connected to said first input terminal; (iv) a first free-wheeling switch connecting said first inductor and said first pass switch to ground; (v) first switch control circuitry with outputs connected to control inputs of said first pass switch and said first free-wheeling switch, said control circuitry including a feedback from said control input of said first pass switch to delay turn-on said first free-wheeling switch until said first pass-switch has been turned off; (b) a second regulator including: (i) a second power input terminal; (ii) a second regulated power output terminal; (iii) a second pass switch connected to said second power input terminal and coupled to said second power output terminal; (iv) second switch control circuitry with outputs connected to control inputs of said second pass switch, said second control circuitry synchronized by said first control circuitry; (c) said first pass switch includes a first field effect transistor; (d) said second pass switch includes a second field effect transistor; (e) said first free-wheeling switch includes a third field effect transistor; (f) said control inputs are the gates of said field effect transistors; and (g) said feedback includes a diode coupled from a driver for the gate of said third transistor to the gate of said first transistor.

Claim 15

A power supply system, comprising: (a) a first regulator including: (i) a first power input terminal; (ii) a first regulated power output terminal; (iii) a first inductor and a first pass switch in series between said first input terminal and said first output terminal, said first inductor directly connected to said first output terminal and said first pass switch connected to said first input terminal; (iv) a first free-wheeling switch connecting said first inductor and said first pass switch to ground; (v) first switch control circuitry with outputs connected to control inputs of said first pass switch and said first free-wheeling switch, said control circuitry including a feedback from said control input of said first pass switch to delay turn-on said first free-wheeling switch until said first pass-switch has been turned off; (b) a second regulator including: (i) a second power input terminal; (ii) a second regulated power output terminal; (iii) a second pass switch connected to said second power input terminal and coupled to said second power output terminal; (iv) second switch control circuitry with outputs connected to control inputs of said second pass switch, said second control circuitry synchronized by said first control circuitry; (c) said first pass switch includes a first field effect transistor; (d) said second pass switch includes a second field effect transistor; (e) said first free-wheeling switch includes a third field effect transistor; (f) said control inputs are the gates of said field effect transistors; and (g) said feedback includes a diode coupled from a driver for the gate of said third transistor to the gate of said first transistor.

Claim 16

The system of claim 12, wherein: (a) said first free-wheeling switch includes a diode in parallel with said second transistor.

Claim 17

The system of claim 12, wherein: (a) said first control circuitry includes a voltage-to-current converter coupled from said output terminal to a capacitor; (b) wherein the voltage on said capacitor triggers said first pass and first free-wheeling switches to switch; (c) said first control circuitry further includes a pulse generator and a flip-flop with the output of said pulse generator clocking said flip-flop and with said voltage on said capacitor coupled to reset said flip-flop; and (d) wherein the output of said flip-flop couples to control inputs of said first pass and first free-wheeling switches.

Claim 18

The system of claim 14, wherein: (a) said first control circuitry includes first and second comparators with the output of said first comparator coupled to the control input of said first pass switch and the output of said second comparator coupled to the control input of said first free-wheeling switch, said first comparator with inputs from said flip-flop and said second comparator with inputs from said flip-flop and the output of said first comparator.

Claim 19

The system of claim 14, wherein: (a) said pulse generator is a first timer in astable connection; and (b) said second control circuitry includes a second timer triggered by said first timer.

Claim 20

A regulator, comprising: (a) a power input terminal; (b) a regulated power output terminal; (c) an inductor and a pass switch in series between said input terminal and said output terminal, said inductor directly connected to said output terminal and said pass switch connected to said input terminal; (d) a free-wheeling switch connecting said inductor and pass switch to ground; (e) switch control circuitry with outputs connected to control inputs of said pass switch and said free-wheeling switch, said control circuitry including a feedback from said control input of said pass switch to delay turn-on said free-wheeling switch until said pass-switch has been turned off; (f) said first and second transistors are n-channel; and (g) said switch control circuitry includes a voltage doubler with output coupled to the gates of said first and second transistors.

Claim 21

A regulator, comprising: (a) a power input terminal; (b) a regulated power output terminal; (c) an inductor and a pass switch in series between said input terminal and said output terminal, said inductor directly connected to said output terminal and said pass switch connected to said input terminal; (d) a free-wheeling switch connecting said inductor and pass switch to ground; (e) switch control circuitry with outputs connected to control inputs of said pass switch and said free-wheeling switch, said control circuitry including a feedback from said control input of said pass switch to delay turn-on said free-wheeling switch until said pass-switch has been turned off; (f) said first and second transistors are n-channel; and (g) said switch control circuitry includes a voltage doubler with output coupled to the gates of said first and second transistors.

Claim 22

The regulator of claim 17, wherein: (a) said free-wheeling switch includes a diode in parallel with said second transistor.

Claim 23

The regulator of claim 17, wherein: (a) said control circuitry includes a voltage-to-current converter coupled from said output terminal to a capacitor; (b) wherein the voltage on said capacitor triggers said switches to switch; (c) said control circuitry further includes a pulse generator and a flip-flop with the output of said pulse generator clocking said flip-flop and with said voltage on said capacitor coupled to reset said flip-flop; and (d) wherein the output of said flip-flop couples to control inputs of said switches.

Claim 24

The regulator of claim 19, wherein: (a) said pulse generator is a timer circuit in astable connection.

Claim 25

The regulator of claim 19, wherein: (a) said control circuitry includes first and second comparators with the output of said first comparator coupled to the control input of said pass switch and the output of said second comparator coupled to the control input of said free-wheeling switch, said first comparator with inputs from said flip-flop and said second comparator with inputs from said flip-flop and the output of said first comparator.

Claim 26

The regulator of claim 21, wherein: (a) said pass switch includes a first field effect transistor; (b) said free-wheeling switch includes a second field effect transistor; (c) said control inputs are the gates of said field effect transistors; and (d) said feedback includes a diode coupled from said input of said second comparator to the gate of said first transistor.