Patent US5349229A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5349229A Expired / Lapsed US ⏱️ 0.0 years remaining

Local interconnect for integrated circuits

Assignee: STMicroelectronics lnc USA
•
Filing: 1992-01-31
•
Granted: 1994-09-20
•
Expires: 2012-01-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Local interconnect is defined in a polycrystalline silicon layer. Openings to underlying conducting regions are made through an insulating layer after the local interconnect conductor definition. A thin extra polycrystalline silicon layer is then deposited over the device and etched back to form polycrystalline silicon sidewall elements. These sidewalls connect the polycrystalline silicon local interconnect conductors to the underlying conductive regions. Standard silicidation techniques are then used to form a refractory metal silicide on the exposed underlying conductive regions, the polycrystalline silicon sidewall elements, and the polycrystalline silicon local interconnect conductors. This results in a complete silicided connection between features connected by the local interconnect conductors.

Inventors

  • 👤 Che-Chia Wei
  • 👤 Fu-Tai Liou

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 10:57
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; H10W20/01; H10W20/031; H10W20/064; H10W20/066; H10W20/0698

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 200 words
A conductive local interconnect structure for a semiconductor integrated circuit, comprising: a substrate; a first polycrystalline interconnect layer over said substrate and separated therefrom by a thin gate oxide layer; an insulating layer over said substrate and said first polycrystalline silicon interconnect layer, said insulating layer being relatively thicker than the thin gate oxide layer and having openings therethrough to conductive regions within said substrate and to a second underlying conductive structure, wherein said second underlying conductive structure comprises a portion of said first polycrystalline silicon interconnect layer; a first patterned polycrystalline silicon layer overlying a portion of said insulating layer, a portion of the second underlying conductive structure, and a portion of a selected conductive region within said substrate; and first and second connecting polycrystalline silicon regions connected to said first patterned polycrystalline silicon layer and extending to contact the selected conductive substrate region and the second underlying conductive structure, respectively; at least a portion of said first patterned polycrystalline silicon layer and said first and second connecting polycrystalline silicon regions containing a refractory metal forming a refractory metal silicide, whereby a refractory metal silicide conductor extends from the selected conductive substrate region to said second underlying conductive structure.
Claim 2
Dependent Claim 200 words
A conductive local interconnect structure for a semiconductor integrated circuit, comprising: a substrate; a first polycrystalline interconnect layer over said substrate and separated therefrom by a thin gate oxide layer; an insulating layer over said substrate and said first polycrystalline silicon interconnect layer, said insulating layer being relatively thicker than the thin gate oxide layer and having openings therethrough to conductive regions within said substrate and to a second underlying conductive structure, wherein said second underlying conductive structure comprises a portion of said first polycrystalline silicon interconnect layer; a first patterned polycrystalline silicon layer overlying a portion of said insulating layer, a portion of the second underlying conductive structure, and a portion of a selected conductive region within said substrate; and first and second connecting polycrystalline silicon regions connected to said first patterned polycrystalline silicon layer and extending to contact the selected conductive substrate region and the second underlying conductive structure, respectively; at least a portion of said first patterned polycrystalline silicon layer and said first and second connecting polycrystalline silicon regions containing a refractory metal forming a refractory metal silicide, whereby a refractory metal silicide conductor extends from the selected conductive substrate region to said second underlying conductive structure.
Claim 3
Dependent Claim 12 words
The conductive structure of claim 1, wherein the refractory metal comprises titanium.
Claim 4
Dependent Claim 27 words
The conductive structure of claim 1, wherein the refractory metal silicide conductor also covers said first and second conductive structures exposed in the first and second openings.
Claim 5
Dependent Claim 22 words
The conductive structure of claim 1, wherein said first patterned polycrystalline silicon layer does not cross over any other polycrystalline silicon structure.

References Cited (Backward Citations)

US4476482A Cited
US4975756A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-09-19 1998-03-21 1998-09-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-09-19 2002-03-21 2002-09-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-09-19 2006-03-21 2006-09-20 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag