Patent US5342476A successfully refreshed from Google Patents.
US5342476A
Expired / Lapsed
US
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Reduction of polycide residues through helium backside pressure control during dry etching
Assignee: Philips Semiconductors Inc
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Filing: 1993-01-21
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Granted: 1994-08-30
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Expires: 2013-01-21
Abstract
Abstract Disclosed are methods for reducing the degree of underetching and particulate contamination occurring during dry non-isotropic etching of a polycide layer on the surface of a silicon wafer maintained in a wafer holder wherein the backside of the holder is cooled with a stream of helium gas. Specifically, in the disclosed methods, dry non-isotropic etching of the polycide layer is conducted either in the absence of backside cooling or the helium gas flow utilized in backside cooling is maintained at a pressure of no more than 3 torr.
Inventors
- 👤 John L. Cain
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 23:43
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/268; Y; Y10; Y10S; Y10S148/00; Y10S148/131
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
155 words
A method for reducing the degree of underetching and particulate formation occurring during dry non-isotropic etching of a polycide layer on the surface of a silicon wafer which comprises: (a) placing a patterned resist layer over the polycide layer found on the surface of the silicon wafer so as to define areas where the polycide layer is exposed and areas where the polycide layer is covered by the resist layer; (b) placing the silicon wafer prepared in (a) above into a wafer holder which holder has heating/cooling means in addition to or alternative to helium backside cooling; (c) removing the exposed polycide layer from the surface of the silicon wafer by dry non-isotropic etching optionally employing backside cooling with a helium gas flow to the backside of the wafer holder wherein the helium gas flow is adjusted to maintain a backside pressure of from 0 to about 3 torr; and (d) removing the resist layer.
Claim 2
Independent Claim
155 words
A method for reducing the degree of underetching and particulate formation occurring during dry non-isotropic etching of a polycide layer on the surface of a silicon wafer which comprises: (a) placing a patterned resist layer over the polycide layer found on the surface of the silicon wafer so as to define areas where the polycide layer is exposed and areas where the polycide layer is covered by the resist layer; (b) placing the silicon wafer prepared in (a) above into a wafer holder which holder has heating/cooling means in addition to or alternative to helium backside cooling; (c) removing the exposed polycide layer from the surface of the silicon wafer by dry non-isotropic etching optionally employing backside cooling with a helium gas flow to the backside of the wafer holder wherein the helium gas flow is adjusted to maintain a backside pressure of from 0 to about 3 torr; and (d) removing the resist layer.
Claim 3
Dependent Claim
20 words
The method according to claim 1 wherein the polycide layer has a thickness of from about 0.05 to 0.5 microns.
Claim 4
Dependent Claim
13 words
The method according to claim 2 wherein the polycide layer is tungsten silicide.
Claim 5
Dependent Claim
21 words
The method according to claim 1 wherein the patterned resist layer is from about 0.5 to about 2 microns in thickness.
Claim 6
Dependent Claim
20 words
The method according to claim 1 wherein the dry non-isotropic etching method utilizing helium backside cooling is reactive ion etching.
Claim 7
Dependent Claim
18 words
The method according to claim 1 wherein the wafer holder is an electrode containing an internal heating/cooling means.
Claim 8
Dependent Claim
31 words
The method according to claim 6 wherein the reactive ion etching is conducted at a temperature of from 20° to 60° C. utilizing SF 6 /C 2 F 6 in chlorine.
Claim 9
Dependent Claim
17 words
The method according to claim 7 wherein the helium backside pressure is maintained at about 2 torr.
Claim 10
Dependent Claim
13 words
The method according to claim 1 wherein no helium backside cooling is employed.
Claim 11
Dependent Claim
147 words
A silicon wafer containing patterned layers of polycide on the surface thereof which wafer is prepared by the method which comprises: (a) placing a patterned resist layer over the polycide layer found on the surface of the silicon wafer so as to define areas where the polycide layer is exposed and areas where the polycide layer is covered by the resist layer; (b) placing the silicon wafer prepared in (a) above into a wafer holder which holder has heating/cooling means in addition to or alternative to helium backside cooling; (c) removing the exposed polycide layer from the surface of the silicon wafer by dry non-isotropic etching optionally employing backside cooling with a helium gas flow to the backside of the wafer holder wherein the helium gas flow is adjusted to maintain a backside pressure of from 0 to about 3 torr; and (d) removing the resist layer.
Claim 12
Dependent Claim
147 words
A silicon wafer containing patterned layers of polycide on the surface thereof which wafer is prepared by the method which comprises: (a) placing a patterned resist layer over the polycide layer found on the surface of the silicon wafer so as to define areas where the polycide layer is exposed and areas where the polycide layer is covered by the resist layer; (b) placing the silicon wafer prepared in (a) above into a wafer holder which holder has heating/cooling means in addition to or alternative to helium backside cooling; (c) removing the exposed polycide layer from the surface of the silicon wafer by dry non-isotropic etching optionally employing backside cooling with a helium gas flow to the backside of the wafer holder wherein the helium gas flow is adjusted to maintain a backside pressure of from 0 to about 3 torr; and (d) removing the resist layer.
Claim 13
Dependent Claim
21 words
The silicon wafer according to claim 10 wherein the polyside layer has a thickness of from about 0.05 to 0.5 microns.
Claim 14
Dependent Claim
14 words
The silicon wafer according to claim 11 wherein the polycide layer is tungsten silicide.
Claim 15
Dependent Claim
22 words
The silicon wafer according to claim 12 wherein the patterned resist layer is from about 0.5 to about 2 microns in thickness.
Claim 16
Dependent Claim
21 words
The silicon wafer according to claim 10 wherein the dry non-isotropic etching method utilizing helium backside cooling is reactive ion etching.
Claim 17
Dependent Claim
19 words
The silicon wafer according to claim 14 wherein the wafer holder is an electrode containing an internal heating/cooling means.
Claim 18
Dependent Claim
32 words
The silicon wafer according to claim 15 wherein the reactive ion etching is conducted at a temperature of from 20° to 60° C. utilizing SF 6 /C 2 F 6 in chlorine.
Claim 19
Dependent Claim
18 words
The silicon wafer according to claim 16 wherein the helium backside pressure is maintained at about 2 torr.
Claim 20
Dependent Claim
14 words
The silicon wafer according to claim 10 wherein no helium backside cooling is employed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-29 | 1998-02-28 | 1998-08-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-29 | 2002-02-28 | 2002-08-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-29 | 2006-02-28 | 2006-08-30 | $7700.00 | Window Closed / Lapsed |