← Back to Patent Explorer
US5341027A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor chip having notches formed in peripheral edges thereof

Assignee: Samsung Electronics Co Ltd
•
Filing: 1992-10-02
•
Granted: 1994-08-23
•
Expires: 2012-10-02
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A semiconductor device which includes a semiconductor integrated circuit chip provided with a plurality of chip bonding pads contiguous with the peripheral edge of the chip, and a plurality of leads directly bonded to respective ones of the chip bonding pads. The bonding pads are preferably formed within respective notches disposed in a marginal edge portion of the chip, with each of the notches having an open end formed in the peripheral edge of the chip. By locating the chip bonding pads contiguous with the peripheral edge of the chip, rather than a prescribed distance away from the peripheral edge of the chip, the bonding pads are directly accessible from the edge of the chip, thereby enabling the leads to be directly bonded to the bonding pads, and thus eliminating the need for bonding bumps or balls.

Inventors

  • 👤 Jong Y. Park
  • 👤 Hag J. Jung

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 20:25
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10W72/071; H10W72/077; H10W72/075; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/921; H10W72/923; H10W72/941; H10W72/944; H10W72/9445; H10W90/00; H10W90/701; H10W90/751; H10W90/756; H10W72/01; H10W72/012; H10W72/01221; H10W72/01225; H10W72/072; H10W72/07231; H10W72/07236; H10W72/07251; H10W72/20; H10W72/251; H10W72/252; H10W72/29; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/701; H10W72/709; H10W72/951; H10W72/952

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 122 words
A semiconductor device, including: a semiconductor chip having top and bottom major surfaces and a plurality of peripheral edges joining said top and bottom major surfaces, said semiconductor chip being provided with a plurality of spaced-apart notches formed in at least one of said peripheral edges of said chip with each of said notches extending laterally inwardly a prescribed distance from a corner formed at the juncture of said top major surface and a corresponding one of said plurality of peripheral edges of said chip; a plurality of bonding pads disposed within respective ones of said notches, said bonding pads being recessed from said top surface of said chip; and a plurality of leads bonded to respective ones of said bonding pads.
Claim 2
Dependent Claim 122 words
A semiconductor device, including: a semiconductor chip having top and bottom major surfaces and a plurality of peripheral edges joining said top and bottom major surfaces, said semiconductor chip being provided with a plurality of spaced-apart notches formed in at least one of said peripheral edges of said chip with each of said notches extending laterally inwardly a prescribed distance from a corner formed at the juncture of said top major surface and a corresponding one of said plurality of peripheral edges of said chip; a plurality of bonding pads disposed within respective ones of said notches, said bonding pads being recessed from said top surface of said chip; and a plurality of leads bonded to respective ones of said bonding pads.
Claim 3
Dependent Claim 39 words
The device as set forth in claim 1, wherein each of said leads comprises an elongated base member and a metal layer provided on a surface thereof which is directly bonded to a respective one of said bonding pads.
Claim 4
Dependent Claim 31 words
The device as set forth in claim 1, wherein said metal layer of each of said leads is made of aluminum and each of said bonding pads is made of aluminum.
Claim 5
Dependent Claim 19 words
The device as set forth in claim 1, wherein each of said leads is attached to a TAB tape.
Claim 6
Dependent Claim 19 words
The device as set forth in claim 1, wherein each of said leads is connected to a lead frame.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-08-22 1998-02-21 1998-08-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-08-22 2002-02-21 2002-08-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-08-22 2006-02-21 2006-08-23 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag