Patent US5339046A successfully refreshed from Google Patents.
US5339046A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Temperature compensated variable gain amplifier
Assignee: Alps Alpine Co Ltd
•
Filing: 1993-06-03
•
Granted: 1994-08-16
•
Expires: 2013-06-03
Abstract
Abstract An amplifier for a radio transceiver overcomes the problem of gain being dependent on ambient temperature. Transmission power is matched to strength of a received signal by providing matched dual gate FET amplifier stages in both the transmitter and receiver portions of the transceiver. Changes in gain due to temperature are compensated for by detecting changes in the FET drain current by measuring the source voltage of the amplifier. The FET source voltage is compared to a reference voltage, and the output signal resulting from the comparison is provided as a control signal to one of the FET gates.
Inventors
- 👤 Richard K. Kornfeld
- 👤 Ana L. Weiland
- 👤 Mitsunari Okazaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 20:46
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/04; H03G1/0005; H03G1/0035; H03G1/007
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
131 words
An amplifier comprising: a field effect transistor having two gate terminals, a drain terminal, and a source terminal; a comparator having two input terminals and an output terminal; wherein a first input terminal of said comparator is connected to a reference voltage, said second input terminal of said comparator is connected to said source terminal and said output terminal of said comparator is connected to one of said two gate terminals; and a source of said reference voltage which includes a second comparator having two input terminals and an output terminal, said two input terminals of said second comparator being connected to respectively a reference signal and a signal strength indicating signal, and said output terminal of said second comparator being connected to said first input terminal of said first comparator.
Claim 2
Dependent Claim
131 words
An amplifier comprising: a field effect transistor having two gate terminals, a drain terminal, and a source terminal; a comparator having two input terminals and an output terminal; wherein a first input terminal of said comparator is connected to a reference voltage, said second input terminal of said comparator is connected to said source terminal and said output terminal of said comparator is connected to one of said two gate terminals; and a source of said reference voltage which includes a second comparator having two input terminals and an output terminal, said two input terminals of said second comparator being connected to respectively a reference signal and a signal strength indicating signal, and said output terminal of said second comparator being connected to said first input terminal of said first comparator.
Claim 3
Dependent Claim
169 words
An amplifier comprising: a field effect transistor having two gate terminals, a drain terminal, and a source terminal; a comparator having two input terminals and an output terminal; wherein a first input terminal of said comparator is connected to a reference voltage, said second input terminal of said comparator is connected to said source terminal and said output terminal of said comparator is connected to one of said two gate terminals; a second field effect transistor having two gate terminals, a drain terminal, and a source terminal; a second comparator associated with said second field effect transistor and having two input terminals and an output terminal; and means for connecting said source terminal of said field effect transistor to a first input terminal of said second comparator, said source terminal of said second field effect transistor being connected to said second input terminal of said second comparator, and said output terminal of said second comparator being connected to one of said gate terminals of said second field effect transistor.
Claim 4
Dependent Claim
169 words
An amplifier comprising: a field effect transistor having two gate terminals, a drain terminal, and a source terminal; a comparator having two input terminals and an output terminal; wherein a first input terminal of said comparator is connected to a reference voltage, said second input terminal of said comparator is connected to said source terminal and said output terminal of said comparator is connected to one of said two gate terminals; a second field effect transistor having two gate terminals, a drain terminal, and a source terminal; a second comparator associated with said second field effect transistor and having two input terminals and an output terminal; and means for connecting said source terminal of said field effect transistor to a first input terminal of said second comparator, said source terminal of said second field effect transistor being connected to said second input terminal of said second comparator, and said output terminal of said second comparator being connected to one of said gate terminals of said second field effect transistor.
Claim 5
Dependent Claim
14 words
The amplifier of claim 2, wherein said means for connecting includes an adding circuit.
Claim 6
Dependent Claim
117 words
An amplifier comprising: a field effect transistor having two gate terminals, a drain terminal, and a source terminal; a comparator having two input terminals and an output terminal; wherein a first input terminal of said comparator is connected to a reference voltage, said second input terminal of said comparator is connected to said source terminal and said output terminal of said comparator is connected to one of said two gate terminals; and a source of said reference voltage which includes: a second field effect transistor having two gate terminals, a source terminal, and a drain terminal; and a circuit connecting said source terminal of said second field effect transistor to said first input terminal of said comparator.
Claim 7
Dependent Claim
117 words
An amplifier comprising: a field effect transistor having two gate terminals, a drain terminal, and a source terminal; a comparator having two input terminals and an output terminal; wherein a first input terminal of said comparator is connected to a reference voltage, said second input terminal of said comparator is connected to said source terminal and said output terminal of said comparator is connected to one of said two gate terminals; and a source of said reference voltage which includes: a second field effect transistor having two gate terminals, a source terminal, and a drain terminal; and a circuit connecting said source terminal of said second field effect transistor to said first input terminal of said comparator.
Claim 8
Dependent Claim
182 words
A compensated variable gain amplifier comprising: a biased field effect transistor having two gate terminals and a source terminal and for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage at said source terminal; means for integrating a difference between a reference signal and said source voltage and for producing said control signal therefrom; a second biased field effect transistor having two gate terminals and a source terminal and for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage at said source terminal; means for adding said source voltage of said first transistor to a adjustment voltage to produce a second reference signal; and means for integrating a difference between said second reference signal and said source voltage of said second transistor and for producing said second control signal therefrom.
Claim 9
Dependent Claim
182 words
A compensated variable gain amplifier comprising: a biased field effect transistor having two gate terminals and a source terminal and for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage at said source terminal; means for integrating a difference between a reference signal and said source voltage and for producing said control signal therefrom; a second biased field effect transistor having two gate terminals and a source terminal and for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage at said source terminal; means for adding said source voltage of said first transistor to a adjustment voltage to produce a second reference signal; and means for integrating a difference between said second reference signal and said source voltage of said second transistor and for producing said second control signal therefrom.
Claim 10
Dependent Claim
18 words
The compensated variable gain amplifier of claim 5, wherein said first means for integrating comprises an operational amplifier.
Claim 11
Dependent Claim
160 words
A compensated variable gain amplifier comprising: a biased field effect transistor having two gate terminals and a source terminal and for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage at said source terminal; means for integrating a difference between a reference signal and said source voltage and for producing said control signal therefrom; a second biased field effect transistor having two gate terminals and a source terminal and for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage at said source terminal; and means for integrating a difference between said reference signal and said source voltage of said second transistor and producing said second control signal therefrom.
Claim 12
Dependent Claim
160 words
A compensated variable gain amplifier comprising: a biased field effect transistor having two gate terminals and a source terminal and for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage at said source terminal; means for integrating a difference between a reference signal and said source voltage and for producing said control signal therefrom; a second biased field effect transistor having two gate terminals and a source terminal and for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage at said source terminal; and means for integrating a difference between said reference signal and said source voltage of said second transistor and producing said second control signal therefrom.
Claim 13
Dependent Claim
165 words
A compensated variable gain amplifier comprising: a biased field effect transistor having two gate terminals and a source terminal and for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage at said source terminal; means for integrating a difference between a reference signal and said source voltage and for producing said control signal therefrom; a second biased field effect transistor having two gate terminals and a source terminal and for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage at said source terminal; and means for integrating a difference between said source voltage of said first transistor and said source voltage of said second transistor and for producing said second control signal therefrom.
Claim 14
Dependent Claim
165 words
A compensated variable gain amplifier comprising: a biased field effect transistor having two gate terminals and a source terminal and for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage at said source terminal; means for integrating a difference between a reference signal and said source voltage and for producing said control signal therefrom; a second biased field effect transistor having two gate terminals and a source terminal and for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage at said source terminal; and means for integrating a difference between said source voltage of said first transistor and said source voltage of said second transistor and for producing said second control signal therefrom.
Claim 15
Dependent Claim
138 words
A compensated variable gain amplifier comprising: a first biased field effect transistor for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage; a second biased field effect transistor for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage; means for adding said source voltage of said first biased field effect transistor to an adjustment voltage and producing a reference signal; and means for integrating a difference between said reference signal and said source voltage of said second transistor and for producing said second control voltage therefrom.
Claim 16
Dependent Claim
138 words
A compensated variable gain amplifier comprising: a first biased field effect transistor for amplifying a signal coupled to a first gate terminal thereof in response to a control signal coupled to a second gate terminal thereof, said biased field effect transistor having a source voltage; a second biased field effect transistor for amplifying a second signal coupled to a first gate terminal of said second transistor in response to a second control signal coupled to a second gate terminal of said second transistor, said second transistor having a source voltage; means for adding said source voltage of said first biased field effect transistor to an adjustment voltage and producing a reference signal; and means for integrating a difference between said reference signal and said source voltage of said second transistor and for producing said second control voltage therefrom.
Claim 17
Independent Claim
192 words
A method of compensation for a dual gate field effect transistor comprising: measuring a voltage level of the source of said dual gate field effect transistor; comparing the measured voltage level to a reference voltage indicating a desired gain of said dual gate field effect transistor and producing a resultant signal; applying said resultant signal to a first gate of said dual gate field effect transistor; applying an analog signal to a second gate of said dual gate field effect transistor; amplifying by said dual gate field effect transistor said analog signal by an amount set by said resultant signal; providing the amplified analog signal at the drain terminal of said dual gate field effect transistor; adding said measured voltage level of the source to an additional signal to produce a sum signal; measuring a voltage level of the source of a second dual gate field effect transistor; comparing the measured voltage level of the source of said second dual gate field effect transistor to said sum signal and producing a second resultant signal; and applying said second resultant signal to the second gate of said second dual gate field effect transistor.
Claim 18
Independent Claim
192 words
A method of compensation for a dual gate field effect transistor comprising: measuring a voltage level of the source of said dual gate field effect transistor; comparing the measured voltage level to a reference voltage indicating a desired gain of said dual gate field effect transistor and producing a resultant signal; applying said resultant signal to a first gate of said dual gate field effect transistor; applying an analog signal to a second gate of said dual gate field effect transistor; amplifying by said dual gate field effect transistor said analog signal by an amount set by said resultant signal; providing the amplified analog signal at the drain terminal of said dual gate field effect transistor; adding said measured voltage level of the source to an additional signal to produce a sum signal; measuring a voltage level of the source of a second dual gate field effect transistor; comparing the measured voltage level of the source of said second dual gate field effect transistor to said sum signal and producing a second resultant signal; and applying said second resultant signal to the second gate of said second dual gate field effect transistor.
Claim 19
Independent Claim
107 words
A method of controlling the gain of a dual gate field effect transistor (FET) comprising the steps of: measuring a current level drawn by the drain of said dual gate FET; comparing the measured current level to a reference signal indicative of a predetermined gain of said dual gate FET and producing a resultant signal; applying said resultant signal to the first gate of said dual gate FET; and providing said reference signal by: providing a reference voltage; providing a signal strength indicating signal; comparing said reference voltage to said signal strength indicating signal; and providing a result of the step of comparing as said reference signal.
Claim 20
Independent Claim
107 words
A method of controlling the gain of a dual gate field effect transistor (FET) comprising the steps of: measuring a current level drawn by the drain of said dual gate FET; comparing the measured current level to a reference signal indicative of a predetermined gain of said dual gate FET and producing a resultant signal; applying said resultant signal to the first gate of said dual gate FET; and providing said reference signal by: providing a reference voltage; providing a signal strength indicating signal; comparing said reference voltage to said signal strength indicating signal; and providing a result of the step of comparing as said reference signal.
Claim 21
Dependent Claim
48 words
The method of claim 11 further comprising the steps of: applying a signal for amplification of the second gate of said dual gate FET; amplifying said signal by an amount set by said resultant signal; and providing an amplified signal at the drain of said dual gate FET.
Claim 22
Dependent Claim
19 words
The method of claim 11 wherein the current measured is proportional to the gain of said dual gate FET.
References Cited (Backward Citations)
US3514710A
Cited
US4041396A
Cited
US4158180A
Cited
US4320350A
Cited
US4578603A
Cited
US4447783A
Cited
US4510460A
Cited
US4495648A
Cited
US4523155A
Cited
US4593409A
Cited
US4654882A
Cited
US4613990A
Cited
US4709403A
Cited
US4602218A
Cited
US4723304A
Cited
US4870698A
Cited
US5029298A
Cited
US5146180A
Cited
US5107225A
Cited
US5132634A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-15 | 1998-02-14 | 1998-08-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-15 | 2002-02-14 | 2002-08-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-15 | 2006-02-14 | 2006-08-16 | $7700.00 | Window Closed / Lapsed |