Process for manufacture of radiation resistant power MOSFET and radiation resistant power MOSFET

Claim 1

A process for the manufacture of a power MOSFET having improved radiation resistance, comprising the steps of: forming a plurality of spaced channel regions of a first conductivity type into a surface of a semiconductor wafer region of a second conductivity type by process steps which include driving impurities into said wafer for a first depth beneath said surface by a high temperature drive to define a plurality of channel regions; forming respective source regions of the second conductivity type and of a predetermined resistance into said region and within each of said channel regions by a process step which includes driving impurities into said wafer for a second depth beneath said surface which is less than said first depth, with an outer periphery of each of said source regions being spaced from an outer periphery of its respective channel region at said surface, thereby to define channel areas between the foregoing, spaced outer peripheries; said predetermined resistance being sufficiently high to act as a ballasting resistance for preventing device failure due to parasitic-bipolar-transistor-induced current hogging in one or more of said source regions; forming a gate oxide over at least selected ones of said channel areas; and forming a gate electrode over said gate oxide and a source electrode over said source regions.