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US5332937A Expired / Lapsed US ⏱️ 0.0 years remaining

Transconductor stage for high frequency filters

Assignee: STMicroelectronics SRL
•
Filing: 1992-09-09
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Granted: 1994-07-26
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Expires: 2012-09-09
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Abstract

Abstract A transconductor differential stage for high-frequency filters, which has a MOS differential input pair with common sources. The drain of each MOS input is connected to the emitter of an npn bipolar. These two matched bipolars have their gates connected together with the gate of a third bipolar, which is diode-connected. Two matched current sources feed the two bipolars, and a third current source feeds the third bipolar. A single controlled current sink is connected to the sources of both MOS input transistors, and also (through a resistor) to the third bipolar.

Inventors

  • 👤 Rinaldo Castello
  • 👤 Roberto Alini
  • 👤 Andrea Baschirotto
  • 👤 Gianfranco Vai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 19:57
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/45179; H03F3/45278; H03F3/45282; H03F3/45286; H03F2203/00; H03F2203/45; H03F2203/45024; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/0422; H03H11/0433

Claims Analysis

Total Claims: 28
Claim 1
Independent Claim 159 words
An integrated circuit, comprising: first and second matched current sources, and a third current source; first and second matched insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof; and first and second matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a voltage source connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together.
Claim 2
Dependent Claim 159 words
An integrated circuit, comprising: first and second matched current sources, and a third current source; first and second matched insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof; and first and second matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a voltage source connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together.
Claim 3
Dependent Claim 19 words
The integrated circuit of claim 1, wherein said voltage source consists essentially of a resistor carrying a constant current.
Claim 4
Dependent Claim 100 words
The integrated circuit of claim 1, wherein said first IGFET is n-channel and has a source connected to said current sink, and a drain connected to the emitter of said first bipolar; and said first bipolar is npn and has a collector connected to said first current source and also operatively connected to provide a first output terminal; and said second IGFET is n-channel and has a source connected to said current sink and a drain connected to the emitter of said second bipolar, and said second bipolar is npn and has a collector connected to said second current source.
Claim 5
Dependent Claim 23 words
The integrated circuit of claim 1, wherein said collector of said second bipolar is also operatively connected to provide a second output terminal.
Claim 6
Dependent Claim 193 words
An integrated circuit, comprising: first and second matched current sources, and a third current source; first and second matched insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof; and first and second matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink, and operatively connected to a second output terminal; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a voltage source connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together; said first and second current sources each incorporating a respective transistor whose conductivity is modulated by a respective one of said first and second output terminals.
Claim 7
Dependent Claim 193 words
An integrated circuit, comprising: first and second matched current sources, and a third current source; first and second matched insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof; and first and second matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink, and operatively connected to a second output terminal; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a voltage source connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together; said first and second current sources each incorporating a respective transistor whose conductivity is modulated by a respective one of said first and second output terminals.
Claim 8
Dependent Claim 23 words
The integrated circuit of claim 5, wherein said collector of said second bipolar is also operatively connected to provide a second output terminal.
Claim 9
Dependent Claim 19 words
The integrated circuit of claim 5, wherein said voltage source consists essentially of a resistor carrying a constant current.
Claim 10
Dependent Claim 100 words
The integrated circuit of claim 5, wherein said first IGFET is n-channel and has a source connected to said current sink, and a drain connected to the emitter of said first bipolar; and said first bipolar is npn and has a collector connected to said first current source and also operatively connected to provide a first output terminal; and said second IGFET is n-channel and has a source connected to said current sink and a drain connected to the emitter of said second bipolar, and said second bipolar is npn and has a collector connected to said second current source.
Claim 11
Dependent Claim 220 words
An integrated circuit, comprising: first and second mutually matched current sources, and a third current source; first and second mutually matched n-channel insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof; and third and fourth mutually matched IGFETs, each having approximately one-half the channel area of said first IGFET, and first and second mutually matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a resistor connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together; and said third IGFET being connected between the gate of said first IGFET and the drain of said second IGFET, and said fourth IGFET being connected between the drain of said first IGFET and the gate of said second IGFET.
Claim 12
Dependent Claim 220 words
An integrated circuit, comprising: first and second mutually matched current sources, and a third current source; first and second mutually matched n-channel insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof; and third and fourth mutually matched IGFETs, each having approximately one-half the channel area of said first IGFET, and first and second mutually matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a resistor connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together; and said third IGFET being connected between the gate of said first IGFET and the drain of said second IGFET, and said fourth IGFET being connected between the drain of said first IGFET and the gate of said second IGFET.
Claim 13
Dependent Claim 88 words
The integrated circuit of claim 9, wherein said first IGFET has a source connected to said current sink, and a drain connected to the emitter of said first bipolar; and said first bipolar has a collector connected to said first current source and also operatively connected to provide a first output terminal; and said second IGFET has a source connected to said current sink and a drain connected to the emitter of said second bipolar, and said second bipolar has a collector connected to said second current source.
Claim 14
Dependent Claim 23 words
The integrated circuit of claim 9, wherein said collector of said second bipolar is also operatively connected to provide a second output terminal.
Claim 15
Dependent Claim 120 words
A transconductor differential stage for high-frequency filters, comprising: an input circuit portion comprising a pair of MOS transistors having gate terminals connected to receive signal inputs; an output circuit portion, comprising a pair of output terminals, and a pair of bipolar transistors each connected in series between a respective one of said MOS transistors and a respective one of said output terminals, said pair of bipolar transistors having their bases connected together: and an additional pair of MOS transistors, each having respective source and drain terminals connected to a corresponding drain terminal of one transistor in said first pair of input transistors, and a respective gate terminal cross-connected to the gate terminal of the other transistor in said first pair.
Claim 16
Dependent Claim 120 words
A transconductor differential stage for high-frequency filters, comprising: an input circuit portion comprising a pair of MOS transistors having gate terminals connected to receive signal inputs; an output circuit portion, comprising a pair of output terminals, and a pair of bipolar transistors each connected in series between a respective one of said MOS transistors and a respective one of said output terminals, said pair of bipolar transistors having their bases connected together: and an additional pair of MOS transistors, each having respective source and drain terminals connected to a corresponding drain terminal of one transistor in said first pair of input transistors, and a respective gate terminal cross-connected to the gate terminal of the other transistor in said first pair.
Claim 17
Dependent Claim 23 words
A differential stage according to claim 12, further comprising bias circuitry connected to bias said MOS transistors in the linear operating range thereof.
Claim 18
Dependent Claim 21 words
A differential stage according to claim 12, wherein said bipolar transistors are connected with said MOS transistors in a cascode configuration.
Claim 19
Dependent Claim 27 words
A differential stage according to claim 12, characterized in that said bipolar transistors have respective emitters connected each to a corresponding drain terminal of said MOS transistors.
Claim 20
Dependent Claim 36 words
A differential stage according to claim 12, comprising an additional bipolar transistor having its base in common with said bipolar transistors and its emitter connected to the sources of said MOS transistors via a voltage source.
Claim 21
Dependent Claim 20 words
A differential stage according to claim 12, wherein the collectors of said bipolar transistors are connected to provide differential outputs.
Claim 22
Dependent Claim 19 words
A differential stage according to claim 16, wherein said voltage source is a resistor carrying an adjustable constant current.
Claim 23
Dependent Claim 28 words
A differential stage according to claim 16, wherein said additional bipolar transistor is arranged in a diode configuration with the base and collector terminals connected to each other.
Claim 24
Dependent Claim 24 words
A differential stage according to claim 16, wherein said pair of bipolar transistors and said additional bipolar transistor are all of the npn type.
Claim 25
Dependent Claim 104 words
A band-pass filter, comprising at least one transconductor stage which comprises: an input circuit portion comprising a pair of MOS transistors having gate terminals connected to receive signal inputs; an output circuit portion, comprising a pair of output terminals, and a pair of bipolar transistors each connected in series between a respective one of said MOS transistors and a respective one of said output terminals, said pair of bipolar transistors having their bases connected together; and an additional bipolar transistor having its base in common with said bipolar transistors and its emitter connected to the sources of said MOS transistors via a voltage source.
Claim 26
Dependent Claim 104 words
A band-pass filter, comprising at least one transconductor stage which comprises: an input circuit portion comprising a pair of MOS transistors having gate terminals connected to receive signal inputs; an output circuit portion, comprising a pair of output terminals, and a pair of bipolar transistors each connected in series between a respective one of said MOS transistors and a respective one of said output terminals, said pair of bipolar transistors having their bases connected together; and an additional bipolar transistor having its base in common with said bipolar transistors and its emitter connected to the sources of said MOS transistors via a voltage source.
Claim 27
Dependent Claim 186 words
An integrated circuit continuous-time filter, comprising: multiple transconductor stages connected to implement a desired transfer function; wherein multiple ones of said transconductor stages each comprise a mixed-technology differential stage which includes: first and second matched current sources, and a third current source; first and second matched insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof: and first and second matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a voltage source connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together.
Claim 28
Dependent Claim 186 words
An integrated circuit continuous-time filter, comprising: multiple transconductor stages connected to implement a desired transfer function; wherein multiple ones of said transconductor stages each comprise a mixed-technology differential stage which includes: first and second matched current sources, and a third current source; first and second matched insulated-gate field-effect transistors (IGFETs), each connected to receive a respective side of a complementary input signal on a gate thereof: and first and second matched bipolar transistors; a current sink controlled to sink a current equal to the sum of said first, second, and third current sources; said first IGFET, first bipolar, and first current source all being connected in series, and connected to said current sink, and operatively connected to a first output terminal; said second IGFET, second bipolar, and second current source all being connected in series, and connected to said current sink; a third bipolar transistor which is diode-connected, and connected to sink current from said third current source; and a voltage source connected between said third bipolar transistor and said current sink; said first, second, and third bipolar transistors all having respective bases thereof connected together.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-07-25 1998-01-24 1998-07-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-07-25 2002-01-24 2002-07-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-07-25 2006-01-24 2006-07-26 $7700.00 Window Closed / Lapsed

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