US5329586A
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Nonlinear echo canceller for data signals using a non-redundant distributed lookup-table architecture
Assignee: Nokia Bell Labs
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Filing: 1992-05-29
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Granted: 1994-07-12
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Expires: 2012-05-29
Abstract
Abstract An echo canceler and associated method for canceling errors encountered in data communications which features reduced complexity and enhanced convergence properties arising from simplification of a table-lookup architecture corresponding to elimination of terms in a Volterra expansion. By adaptively adjusting the values stored in the reduced complexity lookup-tables, the system converges rapidly to the desired values.
Inventors
- 👤 Oscar E. Agazzi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 16:18
CPC Classifications
H; H04; H04B; H04B3/00; H04B3/02; H04B3/20; H04B3/23; H04B3/231
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
122 words
An echo canceler for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M<1, the echo canceler comprising: a series of echo canceler stages, each stage including at least one look-up table; means for applying each bit of each word to a successive pair of the echo canceler stages and means for addressing locations in each look-up table in each stage using a first subset of bits applied to that stage; means for multiplying the output of each look-up table by a respective subset of a second subset of the bits applied to that stage; and means for generating the echo replica as a function of the resulting products in each stage.
Claim 2
Dependent Claim
122 words
An echo canceler for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M<1, the echo canceler comprising: a series of echo canceler stages, each stage including at least one look-up table; means for applying each bit of each word to a successive pair of the echo canceler stages and means for addressing locations in each look-up table in each stage using a first subset of bits applied to that stage; means for multiplying the output of each look-up table by a respective subset of a second subset of the bits applied to that stage; and means for generating the echo replica as a function of the resulting products in each stage.
Claim 3
Dependent Claim
38 words
The echo canceler of claim 1 wherein the bits in said first and second subsets are such that a particular term in a Volterra Series Expansion of the echo replica is not represented in the Volterra Series Expansion.
Claim 4
Dependent Claim
47 words
The echo canceler of claim 1 further comprising means for adapting entries in locations of each look-up table by adding to the entry of the addressed location the product of an echo cancelation error, a gain factor and the bits in the subset of the second subset.
Claim 5
Dependent Claim
23 words
The echo canceler of claim 1 wherein said first subset of bits and said second subset of bits have no bits in common.
Claim 6
Dependent Claim
148 words
An echo canceler for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the echo canceler comprising: a series of echo canceler stages, each stage including at least one look-up table; means for applying each bit of each word to a successive pair of the echo canceler stages; means for addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to an adjacent stage to obtain an output from each look-up table; means for multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the adjacent stage wherein each respective subset comprises at least one bit; and means for generating the echo replica as a function of the resulting products in each stage.
Claim 7
Dependent Claim
148 words
An echo canceler for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the echo canceler comprising: a series of echo canceler stages, each stage including at least one look-up table; means for applying each bit of each word to a successive pair of the echo canceler stages; means for addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to an adjacent stage to obtain an output from each look-up table; means for multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the adjacent stage wherein each respective subset comprises at least one bit; and means for generating the echo replica as a function of the resulting products in each stage.
Claim 8
Dependent Claim
38 words
The echo canceler of claim 5 wherein the bits in said first and second subsets being such that a particular term in a Volterra Series Expansion of the echo replica is not represented in the Volterra Series Expansion.
Claim 9
Dependent Claim
45 words
The echo canceler of claim 5 further comprising means for adapting entries in locations of each look-up table by adding to the entry of the addressed location the product of an echo cancelation error, a gain factor and the bits in the respective different subset.
Claim 10
Dependent Claim
144 words
An echo canceler for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the echo canceler comprising: a series of echo canceler stages, each stage including at least one look-up table; means for applying each bit of each word to a plurality of echo canceler stages; means for addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to other stages to obtain an output from each look-up table; means for multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the other stages wherein each subset comprises at least one bit; and means for generating the echo replica as a function of the resulting products in each stage.
Claim 11
Dependent Claim
144 words
An echo canceler for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the echo canceler comprising: a series of echo canceler stages, each stage including at least one look-up table; means for applying each bit of each word to a plurality of echo canceler stages; means for addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to other stages to obtain an output from each look-up table; means for multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the other stages wherein each subset comprises at least one bit; and means for generating the echo replica as a function of the resulting products in each stage.
Claim 12
Independent Claim
116 words
A method for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the method comprising the steps of: applying each bit of each word to a successive pair of echo canceler stages in a plurality or echo canceler stages, wherein each stage includes at least one look-up table, and addressing locations in each look-up table in each stage using a first subset of bits applied to that stage; multiplying the output of each look-up table by a respective subset of a second subset of the bits applied to that stage; and generating the echo replica as a function of the resulting products in each stage.
Claim 13
Independent Claim
116 words
A method for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the method comprising the steps of: applying each bit of each word to a successive pair of echo canceler stages in a plurality or echo canceler stages, wherein each stage includes at least one look-up table, and addressing locations in each look-up table in each stage using a first subset of bits applied to that stage; multiplying the output of each look-up table by a respective subset of a second subset of the bits applied to that stage; and generating the echo replica as a function of the resulting products in each stage.
Claim 14
Dependent Claim
37 words
The method of claim 9 wherein the bits in said first and second subsets are such that a particular term in a Volterra Series Expansion of the echo replica is not represented in the Volterra Series Expansion.
Claim 15
Dependent Claim
47 words
The method of claim 9 further comprising the step of adapting entries in locations of each look-up table by adding to the entry of the addressed location the product of an echo cancelation error, a gain factor and the bits in the subset of the second subset.
Claim 16
Dependent Claim
24 words
The echo of canceler of claim 9 wherein said first subset of bits and said second subset of bits have no bits in common.
Claim 17
Independent Claim
145 words
A method for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the method comprising the steps of: means for applying each bit of each word to a successive pair of the echo canceler stages in a plurality of echo canceler stages, wherein each stage includes at least one look-up table; addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to an adjacent stage to obtain an output from each look-up table; multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the adjacent stage wherein each respective subset comprises at least one bit; and generating the echo replica as a function of the resulting products in each stage.
Claim 18
Independent Claim
145 words
A method for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the method comprising the steps of: means for applying each bit of each word to a successive pair of the echo canceler stages in a plurality of echo canceler stages, wherein each stage includes at least one look-up table; addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to an adjacent stage to obtain an output from each look-up table; multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the adjacent stage wherein each respective subset comprises at least one bit; and generating the echo replica as a function of the resulting products in each stage.
Claim 19
Dependent Claim
37 words
The method of claim 13 wherein the bits in said first and second subsets being such that a particular term in a Volterra Series Expansion of the echo replica is not represented in the Volterra Series Expansion.
Claim 20
Dependent Claim
45 words
The method of claim 13 further comprising the step of adapting entries in locations of each look-up table by adding to the entry of the addressed location the product of an echo cancelation error, a gain factor and the bits in the respective different subset.
Claim 21
Independent Claim
141 words
A method for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the method comprising the steps of: applying each bit of each word to a first plurality of echo canceler stages in a second plurality of echo canceler stages, wherein each stage includes at least one look-up table; addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to other stages to obtain an output from each look-up table; multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the other stages wherein each subset comprises at least one bit; and generating the echo replica as a function of the resulting products in each stage.
Claim 22
Independent Claim
141 words
A method for generating an echo replica in response to a sequence of transmitted symbols, each symbol represented as an M-bit word, M≧1, the method comprising the steps of: applying each bit of each word to a first plurality of echo canceler stages in a second plurality of echo canceler stages, wherein each stage includes at least one look-up table; addressing locations in each look-up table in each stage using the bits applied to that stage which are also applied to other stages to obtain an output from each look-up table; multiplying the output of each look-up table by a respective different subset of the bits applied to that stage which are not applied to the other stages wherein each subset comprises at least one bit; and generating the echo replica as a function of the resulting products in each stage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-07-11 | 1998-01-10 | 1998-07-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-11 | 2002-01-10 | 2002-07-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-11 | 2006-01-10 | 2006-07-12 | $7700.00 | Window Closed / Lapsed |