Patent US5322807A successfully refreshed from Google Patents.
US5322807A
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US
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Method of making thin film transistors including recrystallization and high pressure oxidation
Assignee: Nokia Bell Labs
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Filing: 1992-08-19
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Granted: 1994-06-21
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Expires: 2012-08-19
Abstract
Abstract A thin film transistor is formed by depositing amorphous silicon and forming a gate structure and then using a high-pressure oxidation to form a high-quality gate oxide that has a layered structure.
Inventors
- 👤 Min-Liang Chen
- 👤 Pradip K. Roy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 16:28
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0316; H10D30/0321; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6731; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; Y; Y10; Y10S; Y10S438/00; Y10S438/909
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
72 words
A method of manufacturing a thin film transistor comprising the steps of: depositing silicon over an insulating substrate; forming a gate structure contacting at least a portion of said silicon, said gate structure having an oxide layer contacting said silicon and a conducting region separated from said silicon by said oxide; annealing to recrystallize said silicon; and forming an additional oxide between said gate structure and said silicon by high pressure oxidation.
Claim 2
Independent Claim
72 words
A method of manufacturing a thin film transistor comprising the steps of: depositing silicon over an insulating substrate; forming a gate structure contacting at least a portion of said silicon, said gate structure having an oxide layer contacting said silicon and a conducting region separated from said silicon by said oxide; annealing to recrystallize said silicon; and forming an additional oxide between said gate structure and said silicon by high pressure oxidation.
Claim 3
Dependent Claim
16 words
A method as recited in claim 1 in which said silicon comprises a plurality of layers.
Claim 4
Dependent Claim
25 words
A method as recited in claim 2 in which said depositing is at a temperature less than the recrystallization temperature and amorphous silicon is deposited.
Claim 5
Dependent Claim
14 words
A method as recited in claim 1 in which said substrate comprises a glass.
Claim 6
Dependent Claim
20 words
A method as recited in claim 1 in which said substrate comprises a dielectric layer formed in integrated circuit fabrication.
Claim 7
Dependent Claim
19 words
A method as recited in claim 1 in which said gate structure is formed before said silicon is deposited.
Claim 8
Dependent Claim
18 words
A method as recited in claim 1 in which silicon is deposited before said gate structure is formed.
Claim 9
Dependent Claim
19 words
A method as recited in claim 1 in which said annealing is at a temperature less than 620° C.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-06-20 | 1997-12-20 | 1998-06-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-06-20 | 2001-12-20 | 2002-06-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-06-20 | 2005-12-20 | 2006-06-21 | $7700.00 | Window Closed / Lapsed |